reg = PEEK32(CRT_DISPLAY_CTRL);
reg = FIELD_VALUE(reg, CRT_DISPLAY_CTRL, SELECT, (output & CRT_2_MASK)>>CRT_2_OFFSET);
/*se blank off */
- reg = FIELD_SET(reg, CRT_DISPLAY_CTRL, BLANK, OFF);
+ reg &= ~CRT_DISPLAY_CTRL_BLANK;
POKE32(CRT_DISPLAY_CTRL, reg);
}
dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CLK, PLL25);
/* Set bit 25:24 of display controller */
- dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, CRTSELECT, CRT);
- dispControl = FIELD_SET(dispControl, CRT_DISPLAY_CTRL, RGBBIT, 24BIT);
+ dispControl |= (CRT_DISPLAY_CTRL_CRTSELECT | CRT_DISPLAY_CTRL_RGBBIT);
/* Set bit 14 of display controller */
dispControl = DISPLAY_CTRL_CLOCK_PHASE;
#define CRT_DISPLAY_CTRL_CLK_PLL80 5
#define CRT_DISPLAY_CTRL_CLK_PLL108 6
#define CRT_DISPLAY_CTRL_CLK_RESERVED 7
-#define CRT_DISPLAY_CTRL_SHIFT_VGA_DAC 26:26
-#define CRT_DISPLAY_CTRL_SHIFT_VGA_DAC_DISABLE 1
-#define CRT_DISPLAY_CTRL_SHIFT_VGA_DAC_ENABLE 0
+#define CRT_DISPLAY_CTRL_SHIFT_VGA_DAC BIT(26)
/* SM750LE definition */
-#define CRT_DISPLAY_CTRL_CRTSELECT 25:25
-#define CRT_DISPLAY_CTRL_CRTSELECT_VGA 0
-#define CRT_DISPLAY_CTRL_CRTSELECT_CRT 1
-#define CRT_DISPLAY_CTRL_RGBBIT 24:24
-#define CRT_DISPLAY_CTRL_RGBBIT_24BIT 0
-#define CRT_DISPLAY_CTRL_RGBBIT_12BIT 1
+#define CRT_DISPLAY_CTRL_CRTSELECT BIT(25)
+#define CRT_DISPLAY_CTRL_RGBBIT BIT(24)
#ifndef VALIDATION_CHIP
- #define CRT_DISPLAY_CTRL_SHIFT_VGA_DAC 26:26
- #define CRT_DISPLAY_CTRL_SHIFT_VGA_DAC_DISABLE 1
- #define CRT_DISPLAY_CTRL_SHIFT_VGA_DAC_ENABLE 0
- #define CRT_DISPLAY_CTRL_CENTERING 24:24
- #define CRT_DISPLAY_CTRL_CENTERING_DISABLE 0
- #define CRT_DISPLAY_CTRL_CENTERING_ENABLE 1
+ #define CRT_DISPLAY_CTRL_CENTERING BIT(24)
#endif
-#define CRT_DISPLAY_CTRL_LOCK_TIMING 23:23
-#define CRT_DISPLAY_CTRL_LOCK_TIMING_DISABLE 0
-#define CRT_DISPLAY_CTRL_LOCK_TIMING_ENABLE 1
-#define CRT_DISPLAY_CTRL_EXPANSION 22:22
-#define CRT_DISPLAY_CTRL_EXPANSION_DISABLE 0
-#define CRT_DISPLAY_CTRL_EXPANSION_ENABLE 1
-#define CRT_DISPLAY_CTRL_VERTICAL_MODE 21:21
-#define CRT_DISPLAY_CTRL_VERTICAL_MODE_REPLICATE 0
-#define CRT_DISPLAY_CTRL_VERTICAL_MODE_INTERPOLATE 1
-#define CRT_DISPLAY_CTRL_HORIZONTAL_MODE 20:20
-#define CRT_DISPLAY_CTRL_HORIZONTAL_MODE_REPLICATE 0
-#define CRT_DISPLAY_CTRL_HORIZONTAL_MODE_INTERPOLATE 1
+#define CRT_DISPLAY_CTRL_LOCK_TIMING BIT(23)
+#define CRT_DISPLAY_CTRL_EXPANSION BIT(22)
+#define CRT_DISPLAY_CTRL_VERTICAL_MODE BIT(21)
+#define CRT_DISPLAY_CTRL_HORIZONTAL_MODE BIT(20)
#define CRT_DISPLAY_CTRL_SELECT 19:18
#define CRT_DISPLAY_CTRL_SELECT_PANEL 0
#define CRT_DISPLAY_CTRL_SELECT_VGA 1
#define CRT_DISPLAY_CTRL_FIFO_3 1
#define CRT_DISPLAY_CTRL_FIFO_7 2
#define CRT_DISPLAY_CTRL_FIFO_11 3
-#define CRT_DISPLAY_CTRL_BLANK 10:10
-#define CRT_DISPLAY_CTRL_BLANK_OFF 0
-#define CRT_DISPLAY_CTRL_BLANK_ON 1
+#define CRT_DISPLAY_CTRL_BLANK BIT(10)
#define CRT_DISPLAY_CTRL_PIXEL 7:4
#define CRT_DISPLAY_CTRL_FORMAT 1:0
#define CRT_DISPLAY_CTRL_FORMAT_8 0
switch (blank) {
case FB_BLANK_UNBLANK:
dpms = CRT_DISPLAY_CTRL_DPMS_0;
- crtdb = CRT_DISPLAY_CTRL_BLANK_OFF;
+ crtdb = 0;
break;
case FB_BLANK_NORMAL:
dpms = CRT_DISPLAY_CTRL_DPMS_0;
- crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
+ crtdb = CRT_DISPLAY_CTRL_BLANK;
break;
case FB_BLANK_VSYNC_SUSPEND:
dpms = CRT_DISPLAY_CTRL_DPMS_2;
- crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
+ crtdb = CRT_DISPLAY_CTRL_BLANK;
break;
case FB_BLANK_HSYNC_SUSPEND:
dpms = CRT_DISPLAY_CTRL_DPMS_1;
- crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
+ crtdb = CRT_DISPLAY_CTRL_BLANK;
break;
case FB_BLANK_POWERDOWN:
dpms = CRT_DISPLAY_CTRL_DPMS_3;
- crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
+ crtdb = CRT_DISPLAY_CTRL_BLANK;
break;
default:
return -EINVAL;
}
if (output->paths & sm750_crt) {
+ unsigned int val;
+
POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, DPMS, dpms));
- POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, BLANK, crtdb));
+
+ val = PEEK32(CRT_DISPLAY_CTRL) & ~CRT_DISPLAY_CTRL_BLANK;
+ POKE32(CRT_DISPLAY_CTRL, val | crtdb);
}
return 0;
}
pr_debug("flag = FB_BLANK_UNBLANK\n");
dpms = SYSTEM_CTRL_DPMS_VPHP;
pps = PANEL_DISPLAY_CTRL_DATA;
- crtdb = CRT_DISPLAY_CTRL_BLANK_OFF;
break;
case FB_BLANK_NORMAL:
pr_debug("flag = FB_BLANK_NORMAL\n");
dpms = SYSTEM_CTRL_DPMS_VPHP;
- crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
+ crtdb = CRT_DISPLAY_CTRL_BLANK;
break;
case FB_BLANK_VSYNC_SUSPEND:
dpms = SYSTEM_CTRL_DPMS_VNHP;
- crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
+ crtdb = CRT_DISPLAY_CTRL_BLANK;
break;
case FB_BLANK_HSYNC_SUSPEND:
dpms = SYSTEM_CTRL_DPMS_VPHN;
- crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
+ crtdb = CRT_DISPLAY_CTRL_BLANK;
break;
case FB_BLANK_POWERDOWN:
dpms = SYSTEM_CTRL_DPMS_VNHN;
- crtdb = CRT_DISPLAY_CTRL_BLANK_ON;
+ crtdb = CRT_DISPLAY_CTRL_BLANK;
break;
}
unsigned int val = PEEK32(SYSTEM_CTRL) & ~SYSTEM_CTRL_DPMS_MASK;
POKE32(SYSTEM_CTRL, val | dpms);
- POKE32(CRT_DISPLAY_CTRL, FIELD_VALUE(PEEK32(CRT_DISPLAY_CTRL), CRT_DISPLAY_CTRL, BLANK, crtdb));
+
+ val = PEEK32(CRT_DISPLAY_CTRL) & ~CRT_DISPLAY_CTRL_BLANK;
+ POKE32(CRT_DISPLAY_CTRL, val | crtdb);
}
if (output->paths & sm750_panel) {