drm: bridge: it66121: Don't clear DDC FIFO twice

The DDC FIFO was cleared before the loop in it66121_get_edid_block(),
and at the beginning of each iteration; which means that it did not have
to be cleared before the loop.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Robert Foss <robert.foss@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20221214125821.12489-8-paul@crapouillou.net

diff --git a/drivers/gpu/drm/bridge/ite-it66121.c b/drivers/gpu/drm/bridge/ite-it66121.c
index 06fa59a..5335d4a 100644 (file)
--- a/drivers/gpu/drm/bridge/ite-it66121.c
+++ b/drivers/gpu/drm/bridge/ite-it66121.c
@@ -456,18 +456,6 @@ static inline int it66121_wait_ddc_ready(struct it66121_ctx *ctx)
        return 0;
 }
 
-static int it66121_clear_ddc_fifo(struct it66121_ctx *ctx)
-{
-       int ret;
-
-       ret = it66121_preamble_ddc(ctx);
-       if (ret)
-               return ret;
-
-       return regmap_write(ctx->regmap, IT66121_DDC_COMMAND_REG,
-                           IT66121_DDC_COMMAND_FIFO_CLR);
-}
-
 static int it66121_abort_ddc_ops(struct it66121_ctx *ctx)
 {
        int ret;
@@ -515,10 +503,6 @@ static int it66121_get_edid_block(void *context, u8 *buf,
        offset = (block % 2) * len;
        block = block / 2;
 
-       ret = it66121_clear_ddc_fifo(ctx);
-       if (ret)
-               return ret;
-
        while (remain > 0) {
                cnt = (remain > IT66121_EDID_FIFO_SIZE) ?
                                IT66121_EDID_FIFO_SIZE : remain;