drm/i915: Wedge the GPU if command parser setup fails

commit a829f033e966d5e4aa27c3ef2b381f51734e4a7f upstream.

Commit 311a50e76a33 ("drm/i915: Add support for mandatory cmdparsing")
introduced mandatory command parsing but setup failures were not
translated into wedging the GPU which was probably the intent.

Possible errors come in two categories. Either the sanity check on
internal tables has failed, which should be caught in CI unless an
affected platform would be missed in testing; or memory allocation failure
happened during driver load, which should be extremely unlikely but for
correctness should still be handled.

v2:
 * Tidy coding style. (Chris)

[airlied: cherry-picked to avoid rc1 base]
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Fixes: 311a50e76a33 ("drm/i915: Add support for mandatory cmdparsing")
Cc: Jon Bloomfield <jon.bloomfield@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris.p.wilson@intel.com>
Reviewed-by: Chris Wilson <chris.p.wilson@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210302114213.1102223-1-tvrtko.ursulin@linux.intel.com
(cherry picked from commit 5a1a659762d35a6dc51047c9127c011303c77b7f)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index efdeb7b7b2a0abf62dccf83699b371d3b5a32ff8..a19537706ed1f1a2083b6d83a029e6b3844624c1 100644 (file)
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -708,9 +708,12 @@ static int engine_setup_common(struct intel_engine_cs *engine)
                goto err_status;
        }
 
+       err = intel_engine_init_cmd_parser(engine);
+       if (err)
+               goto err_cmd_parser;
+
        intel_engine_init_active(engine, ENGINE_PHYSICAL);
        intel_engine_init_execlists(engine);
-       intel_engine_init_cmd_parser(engine);
        intel_engine_init__pm(engine);
        intel_engine_init_retire(engine);
 
@@ -724,6 +727,8 @@ static int engine_setup_common(struct intel_engine_cs *engine)
 
        return 0;
 
+err_cmd_parser:
+       intel_breadcrumbs_free(engine->breadcrumbs);
 err_status:
        cleanup_status_page(engine);
        return err;

diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
index e7362ec22aded354da2803746fee4699b2c4351e..9ce174950340b0b90cf3021ab6553171d6b8d673 100644 (file)
--- a/drivers/gpu/drm/i915/i915_cmd_parser.c
+++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
@@ -939,7 +939,7 @@ static void fini_hash_table(struct intel_engine_cs *engine)
  * struct intel_engine_cs based on whether the platform requires software
  * command parsing.
  */
-void intel_engine_init_cmd_parser(struct intel_engine_cs *engine)
+int intel_engine_init_cmd_parser(struct intel_engine_cs *engine)
 {
        const struct drm_i915_cmd_table *cmd_tables;
        int cmd_table_count;
@@ -947,7 +947,7 @@ void intel_engine_init_cmd_parser(struct intel_engine_cs *engine)
 
        if (!IS_GEN(engine->i915, 7) && !(IS_GEN(engine->i915, 9) &&
                                          engine->class == COPY_ENGINE_CLASS))
-               return;
+               return 0;
 
        switch (engine->class) {
        case RENDER_CLASS:
@@ -1012,19 +1012,19 @@ void intel_engine_init_cmd_parser(struct intel_engine_cs *engine)
                break;
        default:
                MISSING_CASE(engine->class);
-               return;
+               goto out;
        }
 
        if (!validate_cmds_sorted(engine, cmd_tables, cmd_table_count)) {
                drm_err(&engine->i915->drm,
                        "%s: command descriptions are not sorted\n",
                        engine->name);
-               return;
+               goto out;
        }
        if (!validate_regs_sorted(engine)) {
                drm_err(&engine->i915->drm,
                        "%s: registers are not sorted\n", engine->name);
-               return;
+               goto out;
        }
 
        ret = init_hash_table(engine, cmd_tables, cmd_table_count);
@@ -1032,10 +1032,17 @@ void intel_engine_init_cmd_parser(struct intel_engine_cs *engine)
                drm_err(&engine->i915->drm,
                        "%s: initialised failed!\n", engine->name);
                fini_hash_table(engine);
-               return;
+               goto out;
        }
 
        engine->flags |= I915_ENGINE_USING_CMD_PARSER;
+
+out:
+       if (intel_engine_requires_cmd_parser(engine) &&
+           !intel_engine_using_cmd_parser(engine))
+               return -EINVAL;
+
+       return 0;
 }
 
 /**

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index fa830e77bb64830a31993330272421fc588fc4bf..6909901b35513ad48efd60f6e205efd50f23a34d 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1946,7 +1946,7 @@ const char *i915_cache_level_str(struct drm_i915_private *i915, int type);
 
 /* i915_cmd_parser.c */
 int i915_cmd_parser_get_version(struct drm_i915_private *dev_priv);
-void intel_engine_init_cmd_parser(struct intel_engine_cs *engine);
+int intel_engine_init_cmd_parser(struct intel_engine_cs *engine);
 void intel_engine_cleanup_cmd_parser(struct intel_engine_cs *engine);
 int intel_engine_cmd_parser(struct intel_engine_cs *engine,
                            struct i915_vma *batch,