Mark the hardware descriptor as being cache line aligned; on DMA
incoherent architectures, the hardware descriptor should sit in a
separate cache line from the CPU accessed data to avoid polluting
the caches.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
int src_nents;
int sec4_sg_bytes;
struct sec4_sg_entry *sec4_sg;
- u32 hw_desc[DESC_JOB_IO_LEN / sizeof(u32)];
+ u32 hw_desc[DESC_JOB_IO_LEN / sizeof(u32)] ____cacheline_aligned;
};
static inline void ahash_unmap(struct device *dev,