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arm:exynos: Enable data cache at exynos based processors.
author
Łukasz Majewski
<l.majewski@samsung.com>
Tue, 7 Aug 2012 03:24:03 +0000
(
03:24
+0000)
committer
Albert ARIBAUD
<albert.u.boot@aribaud.net>
Sat, 1 Sep 2012 12:58:24 +0000
(14:58 +0200)
This patch enables the L1 data cache for systems based on Samsung
Exynos processor.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
arch/arm/cpu/armv7/exynos/soc.c
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diff --git
a/arch/arm/cpu/armv7/exynos/soc.c
b/arch/arm/cpu/armv7/exynos/soc.c
index
dcfcec2
..
ab65b8d
100644
(file)
--- a/
arch/arm/cpu/armv7/exynos/soc.c
+++ b/
arch/arm/cpu/armv7/exynos/soc.c
@@
-28,3
+28,11
@@
void reset_cpu(ulong addr)
{
writel(0x1, samsung_get_base_swreset());
}
+
+#ifndef CONFIG_SYS_DCACHE_OFF
+void enable_caches(void)
+{
+ /* Enable D-cache. I-cache is already enabled in start.S */
+ dcache_enable();
+}
+#endif