ARM: dts: imx8mn: Add power domain nodes
authorMarek Vasut <marex@denx.de>
Fri, 9 Apr 2021 22:16:06 +0000 (00:16 +0200)
committerMarek Vasut <marex@denx.de>
Sun, 18 Apr 2021 02:29:36 +0000 (04:29 +0200)
Add power domain nodes to DT.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Ye Li <ye.li@nxp.com>
Cc: uboot-imx <uboot-imx@nxp.com>
arch/arm/dts/imx8mn.dtsi
include/dt-bindings/power/imx8mn-power.h [new file with mode: 0644]

index 63005ce..edcb415 100644 (file)
@@ -4,6 +4,8 @@
  */
 
 #include <dt-bindings/clock/imx8mn-clock.h>
+#include <dt-bindings/power/imx8mn-power.h>
+#include <dt-bindings/reset/imx8mq-reset.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
                                interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
                                #reset-cells = <1>;
                        };
+
+                       gpc: gpc@303a0000 {
+                               compatible = "fsl,imx8mn-gpc";
+                               reg = <0x303a0000 0x10000>;
+                               interrupt-parent = <&gic>;
+                               interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+
+                               pgc {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       pgc_hsiomix: power-domain@0 {
+                                               #power-domain-cells = <0>;
+                                               reg = <IMX8MN_POWER_DOMAIN_HSIOMIX>;
+                                               clocks = <&clk IMX8MN_CLK_USB_BUS>;
+                                       };
+
+                                       pgc_otg1: power-domain@1 {
+                                               #power-domain-cells = <0>;
+                                               reg = <IMX8MN_POWER_DOMAIN_OTG1>;
+                                               power-domains = <&pgc_hsiomix>;
+                                       };
+
+                                       pgc_gpumix: power-domain@2 {
+                                               #power-domain-cells = <0>;
+                                               reg = <IMX8MN_POWER_DOMAIN_GPUMIX>;
+                                               clocks = <&clk IMX8MN_CLK_GPU_CORE_ROOT>,
+                                                        <&clk IMX8MN_CLK_GPU_SHADER_DIV>,
+                                                        <&clk IMX8MN_CLK_GPU_BUS_ROOT>,
+                                                        <&clk IMX8MN_CLK_GPU_AHB>;
+                                               resets = <&src IMX8MQ_RESET_GPU_RESET>;
+                                       };
+
+                                       dispmix_pd: power-domain@3 {
+                                               #power-domain-cells = <0>;
+                                               reg = <IMX8MN_POWER_DOMAIN_DISPMIX>;
+                                               clocks = <&clk IMX8MN_CLK_DISP_PIXEL_ROOT>,
+                                                        <&clk IMX8MN_CLK_DISP_AXI_ROOT>,
+                                                        <&clk IMX8MN_CLK_DISP_APB_ROOT>;
+                                       };
+
+                                       mipi_pd: power-domain@4 {
+                                               #power-domain-cells = <0>;
+                                               reg = <IMX8MN_POWER_DOMAIN_MIPI>;
+                                               power-domains = <&dispmix_pd>;
+                                       };
+                               };
+                       };
                };
 
                aips2: bus@30400000 {
                                assigned-clock-parents = <&clk IMX8MN_SYS_PLL2_500M>;
                                phys = <&usbphynop1>;
                                fsl,usbmisc = <&usbmisc1 0>;
+                               power-domains = <&pgc_otg1>;
                                status = "disabled";
                        };
 
diff --git a/include/dt-bindings/power/imx8mn-power.h b/include/dt-bindings/power/imx8mn-power.h
new file mode 100644 (file)
index 0000000..102ee85
--- /dev/null
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
+/*
+ *  Copyright (C) 2020 Compass Electronics Group, LLC
+ */
+
+#ifndef __DT_BINDINGS_IMX8MN_POWER_H__
+#define __DT_BINDINGS_IMX8MN_POWER_H__
+
+#define IMX8MN_POWER_DOMAIN_HSIOMIX    0
+#define IMX8MN_POWER_DOMAIN_OTG1       1
+#define IMX8MN_POWER_DOMAIN_GPUMIX     2
+#define IMX8MN_POWER_DOMAIN_DISPMIX    3
+#define IMX8MN_POWER_DOMAIN_MIPI       4
+
+#endif