arm64: dts: qcom: sm8250: Supply clock from cpufreq node to CPUs
authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Wed, 15 Feb 2023 07:03:53 +0000 (12:33 +0530)
committerBjorn Andersson <andersson@kernel.org>
Wed, 15 Mar 2023 02:30:47 +0000 (19:30 -0700)
Qualcomm platforms making use of CPUFreq HW Engine (EPSS/OSM) supply clocks
to the CPU cores. But this relationship is not represented in DTS so far.

So let's make cpufreq node as the clock provider and CPU nodes as the
consumers. The clock index for each CPU node is based on the frequency
domain index.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230215070400.5901-6-manivannan.sadhasivam@linaro.org
arch/arm64/boot/dts/qcom/sm8250.dtsi

index 2f0e460acccdcd1e319531eb3f346b9c652874ea..44c8851178eb14203e90cf449a6633037e2dfbf7 100644 (file)
@@ -97,6 +97,7 @@
                        device_type = "cpu";
                        compatible = "qcom,kryo485";
                        reg = <0x0 0x0>;
+                       clocks = <&cpufreq_hw 0>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <448>;
                        dynamic-power-coefficient = <205>;
                        device_type = "cpu";
                        compatible = "qcom,kryo485";
                        reg = <0x0 0x100>;
+                       clocks = <&cpufreq_hw 0>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <448>;
                        dynamic-power-coefficient = <205>;
                        device_type = "cpu";
                        compatible = "qcom,kryo485";
                        reg = <0x0 0x200>;
+                       clocks = <&cpufreq_hw 0>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <448>;
                        dynamic-power-coefficient = <205>;
                        device_type = "cpu";
                        compatible = "qcom,kryo485";
                        reg = <0x0 0x300>;
+                       clocks = <&cpufreq_hw 0>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <448>;
                        dynamic-power-coefficient = <205>;
                        device_type = "cpu";
                        compatible = "qcom,kryo485";
                        reg = <0x0 0x400>;
+                       clocks = <&cpufreq_hw 1>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <1024>;
                        dynamic-power-coefficient = <379>;
                        device_type = "cpu";
                        compatible = "qcom,kryo485";
                        reg = <0x0 0x500>;
+                       clocks = <&cpufreq_hw 1>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <1024>;
                        dynamic-power-coefficient = <379>;
                        device_type = "cpu";
                        compatible = "qcom,kryo485";
                        reg = <0x0 0x600>;
+                       clocks = <&cpufreq_hw 1>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <1024>;
                        dynamic-power-coefficient = <379>;
                        device_type = "cpu";
                        compatible = "qcom,kryo485";
                        reg = <0x0 0x700>;
+                       clocks = <&cpufreq_hw 2>;
                        enable-method = "psci";
                        capacity-dmips-mhz = <1024>;
                        dynamic-power-coefficient = <444>;
                                     <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
                        interrupt-names = "dcvsh-irq-0", "dcvsh-irq-1", "dcvsh-irq-2";
                        #freq-domain-cells = <1>;
+                       #clock-cells = <1>;
                };
        };