In Tegra20 any memory controller interrupt would cause an
infinite loop in the IRQ handler.
Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
mask &= stat;
if (!mask)
return IRQ_NONE;
- while ((bit = ffs(mask)) != 0)
+ while ((bit = ffs(mask)) != 0) {
tegra20_mc_decode(mc, bit - 1);
+ mask &= ~BIT(bit - 1);
+ }
+
mc_writel(mc, stat, MC_INTSTATUS);
return IRQ_HANDLED;
}