common: return type board_get_usable_ram_top
authorHeinrich Schuchardt <heinrich.schuchardt@canonical.com>
Sat, 12 Aug 2023 18:16:58 +0000 (20:16 +0200)
committerHeinrich Schuchardt <heinrich.schuchardt@canonical.com>
Tue, 15 Aug 2023 16:21:17 +0000 (18:21 +0200)
board_get_usable_ram_top() returns a physical address that is stored in
gd->ram_top. The return type of the function should be phys_addr_t like the
current type of gd->ram_top.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
35 files changed:
arch/arm/mach-imx/imx8m/soc.c
arch/arm/mach-mvebu/arm64-common.c
arch/arm/mach-rockchip/sdram.c
arch/arm/mach-stm32mp/dram_init.c
arch/arm/mach-sunxi/board.c
arch/arm/mach-tegra/board2.c
arch/mips/mach-jz47xx/jz4780/jz4780.c
arch/mips/mach-octeon/dram.c
arch/riscv/cpu/fu540/dram.c
arch/riscv/cpu/fu740/dram.c
arch/riscv/cpu/generic/dram.c
arch/riscv/cpu/jh7110/dram.c
arch/x86/cpu/broadwell/sdram.c
arch/x86/cpu/coreboot/sdram.c
arch/x86/cpu/efi/payload.c
arch/x86/cpu/efi/sdram.c
arch/x86/cpu/ivybridge/sdram.c
arch/x86/cpu/qemu/dram.c
arch/x86/cpu/quark/dram.c
arch/x86/cpu/slimbootloader/sdram.c
arch/x86/cpu/tangier/sdram.c
arch/x86/include/asm/u-boot-x86.h
arch/x86/lib/fsp1/fsp_dram.c
arch/x86/lib/fsp2/fsp_dram.c
board/broadcom/bcmns3/ns3.c
board/imgtec/boston/ddr.c
board/menlo/m53menlo/m53menlo.c
board/raspberrypi/rpi/rpi.c
board/ti/am65x/evm.c
board/ti/j721e/evm.c
board/ti/j721s2/evm.c
board/toradex/verdin-am62/verdin-am62.c
board/xilinx/common/board.c
common/board_f.c
include/init.h

index d525488..78b775f 100644 (file)
@@ -333,7 +333,7 @@ phys_size_t get_effective_memsize(void)
        }
 }
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        ulong top_addr;
 
index d3a9573..4c67f1a 100644 (file)
@@ -30,7 +30,7 @@ DECLARE_GLOBAL_DATA_PTR;
  */
 #define USABLE_RAM_SIZE                0x80000000ULL
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        unsigned long top = CFG_SYS_SDRAM_BASE + min(gd->ram_size, USABLE_RAM_SIZE);
 
index 1d17a74..99ecbdc 100644 (file)
@@ -216,7 +216,7 @@ int dram_init(void)
        return 0;
 }
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        unsigned long top = CFG_SYS_SDRAM_BASE + SDRAM_MAX_SIZE;
 
index 80ba5c2..7f37b0d 100644 (file)
@@ -40,7 +40,7 @@ int dram_init(void)
        return 0;
 }
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        phys_size_t size;
        phys_addr_t reg;
index 391a65a..78597ad 100644 (file)
@@ -64,7 +64,7 @@ static struct mm_region sunxi_mem_map[] = {
 };
 struct mm_region *mem_map = sunxi_mem_map;
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        /* Some devices (like the EMAC) have a 32-bit DMA limit. */
        if (gd->ram_top > (1ULL << 32))
index 0df1836..981768b 100644 (file)
@@ -403,7 +403,7 @@ int dram_init_banksize(void)
  * This function is called before dram_init_banksize(), so we can't simply
  * return gd->bd->bi_dram[1].start + gd->bd->bi_dram[1].size.
  */
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        ulong ram_top;
 
index 15d1eff..676c305 100644 (file)
@@ -76,7 +76,7 @@ void board_init_f(ulong dummy)
 }
 #endif /* CONFIG_SPL_BUILD */
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        return CFG_SYS_SDRAM_BASE + (256 * 1024 * 1024);
 }
index 85cb084..5b1311d 100644 (file)
@@ -77,7 +77,7 @@ phys_size_t get_effective_memsize(void)
        return UBOOT_RAM_SIZE_MAX;
 }
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        if (IS_ENABLED(CONFIG_RAM_OCTEON)) {
                /* Map a maximum of 256MiB - return not size but address */
index 44e11bd..94d8018 100644 (file)
@@ -21,7 +21,7 @@ int dram_init_banksize(void)
        return fdtdec_setup_memory_banksize();
 }
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        /*
         * Ensure that we run from first 4GB so that all
index d6d4a41..8657fcd 100644 (file)
@@ -20,7 +20,7 @@ int dram_init_banksize(void)
        return fdtdec_setup_memory_banksize();
 }
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
 #ifdef CONFIG_64BIT
        /*
index 44e11bd..94d8018 100644 (file)
@@ -21,7 +21,7 @@ int dram_init_banksize(void)
        return fdtdec_setup_memory_banksize();
 }
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        /*
         * Ensure that we run from first 4GB so that all
index 2ad3f20..1a9fa46 100644 (file)
@@ -21,7 +21,7 @@ int dram_init_banksize(void)
        return fdtdec_setup_memory_banksize();
 }
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        /*
         * Ensure that we run from first 4GB so that all
index 1295121..f477d51 100644 (file)
@@ -25,7 +25,7 @@
 #include <asm/arch/pei_data.h>
 #include <asm/arch/pm.h>
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        return mrc_common_board_get_usable_ram_top(total_size);
 }
index f4ee4cd..26352df 100644 (file)
@@ -27,7 +27,7 @@ unsigned int install_e820_map(unsigned int max_entries,
  * address, and how far U-Boot is moved by relocation are set in the global
  * data structure.
  */
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        uintptr_t dest_addr = 0;
        int i;
index 19a25dd..d8920ef 100644 (file)
@@ -27,7 +27,7 @@ DECLARE_GLOBAL_DATA_PTR;
  * the relocation address, and how far U-Boot is moved by relocation are
  * set in the global data structure.
  */
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        struct efi_mem_desc *desc, *end;
        struct efi_entry_memmap *map;
index f3086db..56f3326 100644 (file)
@@ -11,7 +11,7 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        return (ulong)efi_get_ram_base() + gd->ram_size;
 }
index 0718aef..95a826d 100644 (file)
@@ -46,7 +46,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #define CMOS_OFFSET_MRC_SEED_S3                156
 #define CMOS_OFFSET_MRC_SEED_CHK       160
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        return mrc_common_board_get_usable_ram_top(total_size);
 }
index 1a52d1d..d83abf0 100644 (file)
@@ -72,7 +72,7 @@ int dram_init_banksize(void)
  * the relocation address, and how far U-Boot is moved by relocation are
  * set in the global data structure.
  */
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        return qemu_get_low_memory_size();
 }
index 8b1ee2d..ad98f3e 100644 (file)
@@ -184,7 +184,7 @@ int dram_init_banksize(void)
  * the relocation address, and how far U-Boot is moved by relocation are
  * set in the global data structure.
  */
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        return gd->ram_size;
 }
index d748d5c..fbb33b2 100644 (file)
@@ -48,7 +48,7 @@ static struct sbl_memory_map_info *get_memory_map_info(void)
  * @total_size: The memory size that u-boot occupies
  * Return:    : The top available memory address lower than 4GB
  */
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        struct sbl_memory_map_info *data;
        int i;
index 8a4b1c5..ee74a1f 100644 (file)
@@ -204,7 +204,7 @@ unsigned int install_e820_map(unsigned int max_entries,
  * address, and how far U-Boot is moved by relocation are set in the global
  * data structure.
  */
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        struct sfi_table_simple *sb;
        struct sfi_mem_entry *mentry;
index 02a8b0f..3acc58a 100644 (file)
@@ -77,7 +77,7 @@ int x86_cleanup_before_linux(void);
 void x86_enable_caches(void);
 void x86_disable_caches(void);
 int x86_init_cache(void);
-phys_size_t board_get_usable_ram_top(phys_size_t total_size);
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size);
 int default_print_cpuinfo(void);
 
 /* Set up a UART which can be used with printch(), printhex8(), etc. */
index 5825221..eee9ce5 100644 (file)
@@ -34,7 +34,7 @@ int dram_init(void)
  * the relocation address, and how far U-Boot is moved by relocation are
  * set in the global data structure.
  */
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        return fsp_get_usable_lowmem_top(gd->arch.hob_list);
 }
index f9ea1ab..a143223 100644 (file)
@@ -77,7 +77,7 @@ int dram_init(void)
        return 0;
 }
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        if (!ll_boot_init())
                return gd->ram_size;
index 2a78df6..7ae6742 100644 (file)
@@ -183,7 +183,7 @@ int dram_init_banksize(void)
 }
 
 /* Limit RAM used by U-Boot to the DDR first bank End region */
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        return BCM_NS3_MEM_END;
 }
index 8532225..cecf454 100644 (file)
@@ -23,7 +23,7 @@ int dram_init(void)
        return 0;
 }
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        DECLARE_GLOBAL_DATA_PTR;
 
index ca3b81c..b8dffb0 100644 (file)
@@ -42,7 +42,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 static u32 mx53_dram_size[2];
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        /*
         * WARNING: We must override get_effective_memsize() function here
index 38bcab1..cd823ad 100644 (file)
@@ -334,7 +334,7 @@ static void set_fdt_addr(void)
 /*
  * Prevent relocation from stomping on a firmware provided FDT blob.
  */
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        if ((gd->ram_top - fw_dtb_pointer) > SZ_64M)
                return gd->ram_top;
index 706b219..d52ac33 100644 (file)
@@ -59,7 +59,7 @@ int dram_init(void)
        return 0;
 }
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
 #ifdef CONFIG_PHYS_64BIT
        /* Limit RAM used by U-Boot to the DDR low region */
index 2398bea..38fe447 100644 (file)
@@ -55,7 +55,7 @@ int dram_init(void)
        return 0;
 }
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
 #ifdef CONFIG_PHYS_64BIT
        /* Limit RAM used by U-Boot to the DDR low region */
index 8eaca9d..7795300 100644 (file)
@@ -43,7 +43,7 @@ int dram_init(void)
        return 0;
 }
 
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
 #ifdef CONFIG_PHYS_64BIT
        /* Limit RAM used by U-Boot to the DDR low region */
index 5b166b1..a3d1d07 100644 (file)
@@ -37,7 +37,7 @@ int dram_init(void)
 /*
  * Avoid relocated U-Boot clash with Linux reserved-memory on 512 MB SoM
  */
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        return 0x9C000000;
 }
index 0328d68..906d5e3 100644 (file)
@@ -627,7 +627,7 @@ int embedded_dtb_select(void)
 #endif
 
 #if defined(CONFIG_LMB)
-phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
        phys_size_t size;
        phys_addr_t reg;
index 791c1e6..e9f4edb 100644 (file)
@@ -330,7 +330,7 @@ __weak int mach_cpu_init(void)
 }
 
 /* Get the top of usable RAM */
-__weak phys_size_t board_get_usable_ram_top(phys_size_t total_size)
+__weak phys_addr_t board_get_usable_ram_top(phys_size_t total_size)
 {
 #if defined(CFG_SYS_SDRAM_BASE) && CFG_SYS_SDRAM_BASE > 0
        /*
index dc3c1f2..3bf3047 100644 (file)
@@ -309,7 +309,7 @@ int show_board_info(void);
  * @total_size:        monitor length in bytes (size of U-Boot code)
  * Return:     uppermost address for U-Boot relocation
  */
-phys_size_t board_get_usable_ram_top(phys_size_t total_size);
+phys_addr_t board_get_usable_ram_top(phys_size_t total_size);
 
 int board_early_init_f(void);