sparc.md (*adddi3_insn_sp32): Rename.

	* config/sparc/sparc.md (*adddi3_insn_sp32): Rename.
	(*adddi3_extend_sp32): Likewise.
	(*subdi3_insn_sp32): Likewise.
	(*subdi3_extend_sp32): Likewise.
	(*negdi2_sp32): Use negative test for consistency.

From-SVN: r165397

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c414447..a9771aa 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2010-10-12  Eric Botcazou  <ebotcazou@adacore.com>
+
+       * config/sparc/sparc.md (*adddi3_insn_sp32): Rename.
+       (*adddi3_extend_sp32): Likewise.
+       (*subdi3_insn_sp32): Likewise.
+       (*subdi3_extend_sp32): Likewise.
+       (*negdi2_sp32): Use negative test for consistency.
+
 2010-10-12  Nathan Froyd  <froydnj@codesourcery.com>
 
        * libgcc2.h: Use __SIZEOF_DOUBLE__ instead of

diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index 301a63c..16b1116 100644 (file)
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -3507,7 +3507,7 @@
     }
 })
 
-(define_insn_and_split "adddi3_insn_sp32"
+(define_insn_and_split "*adddi3_insn_sp32"
   [(set (match_operand:DI 0 "register_operand" "=r")
        (plus:DI (match_operand:DI 1 "arith_double_operand" "%r")
                 (match_operand:DI 2 "arith_double_operand" "rHI")))
@@ -3580,7 +3580,7 @@
   "addx\t%r1, %2, %0"
   [(set_attr "type" "ialuX")])
 
-(define_insn_and_split ""
+(define_insn_and_split "*adddi3_extend_sp32"
   [(set (match_operand:DI 0 "register_operand" "=r")
         (plus:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "r"))
                  (match_operand:DI 2 "register_operand" "r")))
@@ -3680,7 +3680,7 @@
     }
 })
 
-(define_insn_and_split "subdi3_insn_sp32"
+(define_insn_and_split "*subdi3_insn_sp32"
   [(set (match_operand:DI 0 "register_operand" "=r")
        (minus:DI (match_operand:DI 1 "register_operand" "r")
                  (match_operand:DI 2 "arith_double_operand" "rHI")))
@@ -3752,7 +3752,7 @@
    operands[4] = gen_highpart (SImode, operands[0]);"
   [(set_attr "length" "2")])
 
-(define_insn_and_split ""
+(define_insn_and_split "*subdi3_extend_sp32"
   [(set (match_operand:DI 0 "register_operand" "=r")
       (minus:DI (match_operand:DI 1 "register_operand" "r")
                 (zero_extend:DI (match_operand:SI 2 "register_operand" "r"))))
@@ -5064,7 +5064,7 @@
   [(set (match_operand:DI 0 "register_operand" "=r")
        (neg:DI (match_operand:DI 1 "register_operand" "r")))
    (clobber (reg:CC 100))]
-  "TARGET_ARCH32"
+  "! TARGET_ARCH64"
   "#"
   "&& reload_completed"
   [(parallel [(set (reg:CC_NOOV 100)