ret i1 false
}
+define void @abs1(i32 %a, i1* %p) {
+; CHECK-LABEL: @abs1(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[A:%.*]], 10
+; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[A]], -20
+; CHECK-NEXT: [[AND:%.*]] = and i1 [[CMP1]], [[CMP2]]
+; CHECK-NEXT: br i1 [[AND]], label [[GUARD:%.*]], label [[EXIT:%.*]]
+; CHECK: guard:
+; CHECK-NEXT: [[SUB:%.*]] = sub i32 0, [[A]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A]], 0
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[A]]
+; CHECK-NEXT: br label [[SPLIT:%.*]]
+; CHECK: split:
+; CHECK-NEXT: store i1 true, i1* [[P:%.*]]
+; CHECK-NEXT: [[C2:%.*]] = icmp slt i32 [[ABS]], 19
+; CHECK-NEXT: store i1 [[C2]], i1* [[P]]
+; CHECK-NEXT: [[C3:%.*]] = icmp sge i32 [[ABS]], 0
+; CHECK-NEXT: store i1 [[C3]], i1* [[P]]
+; CHECK-NEXT: [[C4:%.*]] = icmp sge i32 [[ABS]], 1
+; CHECK-NEXT: store i1 [[C4]], i1* [[P]]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+entry:
+ %cmp1 = icmp slt i32 %a, 10
+ %cmp2 = icmp sgt i32 %a, -20
+ %and = and i1 %cmp1, %cmp2
+ br i1 %and, label %guard, label %exit
+
+guard:
+ %sub = sub i32 0, %a
+ %cmp = icmp slt i32 %a, 0
+ %abs = select i1 %cmp, i32 %sub, i32 %a
+ br label %split
+
+split:
+ %c1 = icmp slt i32 %abs, 20
+ store i1 %c1, i1* %p
+ %c2 = icmp slt i32 %abs, 19
+ store i1 %c2, i1* %p
+ %c3 = icmp sge i32 %abs, 0
+ store i1 %c3, i1* %p
+ %c4 = icmp sge i32 %abs, 1
+ store i1 %c4, i1* %p
+ br label %exit
+
+exit:
+ ret void
+}
+
+define void @abs2(i32 %a, i1* %p) {
+; CHECK-LABEL: @abs2(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[A:%.*]], 10
+; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[A]], -20
+; CHECK-NEXT: [[AND:%.*]] = and i1 [[CMP1]], [[CMP2]]
+; CHECK-NEXT: br i1 [[AND]], label [[GUARD:%.*]], label [[EXIT:%.*]]
+; CHECK: guard:
+; CHECK-NEXT: [[SUB:%.*]] = sub i32 0, [[A]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[A]], 0
+; CHECK-NEXT: [[ABS:%.*]] = select i1 [[CMP]], i32 [[A]], i32 [[SUB]]
+; CHECK-NEXT: br label [[SPLIT:%.*]]
+; CHECK: split:
+; CHECK-NEXT: store i1 true, i1* [[P:%.*]]
+; CHECK-NEXT: [[C2:%.*]] = icmp slt i32 [[ABS]], 19
+; CHECK-NEXT: store i1 [[C2]], i1* [[P]]
+; CHECK-NEXT: [[C3:%.*]] = icmp sge i32 [[ABS]], 0
+; CHECK-NEXT: store i1 [[C3]], i1* [[P]]
+; CHECK-NEXT: [[C4:%.*]] = icmp sge i32 [[ABS]], 1
+; CHECK-NEXT: store i1 [[C4]], i1* [[P]]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+entry:
+ %cmp1 = icmp slt i32 %a, 10
+ %cmp2 = icmp sgt i32 %a, -20
+ %and = and i1 %cmp1, %cmp2
+ br i1 %and, label %guard, label %exit
+
+guard:
+ %sub = sub i32 0, %a
+ %cmp = icmp sge i32 %a, 0
+ %abs = select i1 %cmp, i32 %a, i32 %sub
+ br label %split
+
+split:
+ %c1 = icmp slt i32 %abs, 20
+ store i1 %c1, i1* %p
+ %c2 = icmp slt i32 %abs, 19
+ store i1 %c2, i1* %p
+ %c3 = icmp sge i32 %abs, 0
+ store i1 %c3, i1* %p
+ %c4 = icmp sge i32 %abs, 1
+ store i1 %c4, i1* %p
+ br label %exit
+
+exit:
+ ret void
+}
+
+define void @nabs1(i32 %a, i1* %p) {
+; CHECK-LABEL: @nabs1(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[A:%.*]], 10
+; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[A]], -20
+; CHECK-NEXT: [[AND:%.*]] = and i1 [[CMP1]], [[CMP2]]
+; CHECK-NEXT: br i1 [[AND]], label [[GUARD:%.*]], label [[EXIT:%.*]]
+; CHECK: guard:
+; CHECK-NEXT: [[SUB:%.*]] = sub i32 0, [[A]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[A]], 0
+; CHECK-NEXT: [[NABS:%.*]] = select i1 [[CMP]], i32 [[SUB]], i32 [[A]]
+; CHECK-NEXT: br label [[SPLIT:%.*]]
+; CHECK: split:
+; CHECK-NEXT: store i1 true, i1* [[P:%.*]]
+; CHECK-NEXT: [[C2:%.*]] = icmp sgt i32 [[NABS]], -19
+; CHECK-NEXT: store i1 [[C2]], i1* [[P]]
+; CHECK-NEXT: [[C3:%.*]] = icmp sle i32 [[NABS]], 0
+; CHECK-NEXT: store i1 [[C3]], i1* [[P]]
+; CHECK-NEXT: [[C4:%.*]] = icmp sle i32 [[NABS]], -1
+; CHECK-NEXT: store i1 [[C4]], i1* [[P]]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+entry:
+ %cmp1 = icmp slt i32 %a, 10
+ %cmp2 = icmp sgt i32 %a, -20
+ %and = and i1 %cmp1, %cmp2
+ br i1 %and, label %guard, label %exit
+
+guard:
+ %sub = sub i32 0, %a
+ %cmp = icmp sgt i32 %a, 0
+ %nabs = select i1 %cmp, i32 %sub, i32 %a
+ br label %split
+
+split:
+ %c1 = icmp sgt i32 %nabs, -20
+ store i1 %c1, i1* %p
+ %c2 = icmp sgt i32 %nabs, -19
+ store i1 %c2, i1* %p
+ %c3 = icmp sle i32 %nabs, 0
+ store i1 %c3, i1* %p
+ %c4 = icmp sle i32 %nabs, -1
+ store i1 %c4, i1* %p
+ br label %exit
+
+exit:
+ ret void
+}
+
+define void @nabs2(i32 %a, i1* %p) {
+; CHECK-LABEL: @nabs2(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP1:%.*]] = icmp slt i32 [[A:%.*]], 10
+; CHECK-NEXT: [[CMP2:%.*]] = icmp sgt i32 [[A]], -20
+; CHECK-NEXT: [[AND:%.*]] = and i1 [[CMP1]], [[CMP2]]
+; CHECK-NEXT: br i1 [[AND]], label [[GUARD:%.*]], label [[EXIT:%.*]]
+; CHECK: guard:
+; CHECK-NEXT: [[SUB:%.*]] = sub i32 0, [[A]]
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[A]], 0
+; CHECK-NEXT: [[NABS:%.*]] = select i1 [[CMP]], i32 [[A]], i32 [[SUB]]
+; CHECK-NEXT: br label [[SPLIT:%.*]]
+; CHECK: split:
+; CHECK-NEXT: store i1 true, i1* [[P:%.*]]
+; CHECK-NEXT: [[C2:%.*]] = icmp sgt i32 [[NABS]], -19
+; CHECK-NEXT: store i1 [[C2]], i1* [[P]]
+; CHECK-NEXT: [[C3:%.*]] = icmp sle i32 [[NABS]], 0
+; CHECK-NEXT: store i1 [[C3]], i1* [[P]]
+; CHECK-NEXT: [[C4:%.*]] = icmp sle i32 [[NABS]], -1
+; CHECK-NEXT: store i1 [[C4]], i1* [[P]]
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: ret void
+;
+entry:
+ %cmp1 = icmp slt i32 %a, 10
+ %cmp2 = icmp sgt i32 %a, -20
+ %and = and i1 %cmp1, %cmp2
+ br i1 %and, label %guard, label %exit
+
+guard:
+ %sub = sub i32 0, %a
+ %cmp = icmp slt i32 %a, 0
+ %nabs = select i1 %cmp, i32 %a, i32 %sub
+ br label %split
+
+split:
+ %c1 = icmp sgt i32 %nabs, -20
+ store i1 %c1, i1* %p
+ %c2 = icmp sgt i32 %nabs, -19
+ store i1 %c2, i1* %p
+ %c3 = icmp sle i32 %nabs, 0
+ store i1 %c3, i1* %p
+ %c4 = icmp sle i32 %nabs, -1
+ store i1 %c4, i1* %p
+ br label %exit
+
+exit:
+ ret void
+}
+
define i1 @zext_unknown(i8 %a) {
; CHECK-LABEL: @zext_unknown(
; CHECK-NEXT: entry: