static inline void pdc_write(void __iomem *ptr, u32 offset, u32 value)
{
- return msm_writel(value, ptr + (offset << 2));
+ msm_writel(value, ptr + (offset << 2));
}
static void __iomem *a6xx_gmu_get_mmio(struct platform_device *pdev,
static inline void gmu_write(struct a6xx_gmu *gmu, u32 offset, u32 value)
{
- return msm_writel(value, gmu->mmio + (offset << 2));
+ msm_writel(value, gmu->mmio + (offset << 2));
}
static inline void
static inline void gmu_write_rscc(struct a6xx_gmu *gmu, u32 offset, u32 value)
{
- return msm_writel(value, gmu->rscc + (offset << 2));
+ msm_writel(value, gmu->rscc + (offset << 2));
}
#define gmu_poll_timeout_rscc(gmu, addr, val, cond, interval, timeout) \
static void a6xx_llc_write(struct a6xx_gpu *a6xx_gpu, u32 reg, u32 value)
{
- return msm_writel(value, a6xx_gpu->llc_mmio + (reg << 2));
+ msm_writel(value, a6xx_gpu->llc_mmio + (reg << 2));
}
static void a6xx_llc_deactivate(struct a6xx_gpu *a6xx_gpu)