arm64: dts: renesas: rcar-gen3: Add reset control properties for display
authorGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 18 Feb 2020 13:30:18 +0000 (14:30 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 21 Feb 2020 13:41:36 +0000 (14:41 +0100)
Add reset control properties to the device nodes for the Display Units
on all supported R-Car Gen3 SoCs.  Note that on these SoCs, there is
only a single reset for each pair of DU channels.

The display nodes on R-Car V3M and V3H already had "resets" properties,
but lacked the corresponding "reset-names" properties.

Join the clocks lines while at it, to increase uniformity.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulrich Hecht <uli+renesas@fpond.eu>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20200218133019.22299-4-geert+renesas@glider.be
arch/arm64/boot/dts/renesas/r8a77951.dtsi
arch/arm64/boot/dts/renesas/r8a77960.dtsi
arch/arm64/boot/dts/renesas/r8a77965.dtsi
arch/arm64/boot/dts/renesas/r8a77970.dtsi
arch/arm64/boot/dts/renesas/r8a77980.dtsi
arch/arm64/boot/dts/renesas/r8a77990.dtsi
arch/arm64/boot/dts/renesas/r8a77995.dtsi

index 27cbe69..5222954 100644 (file)
                                     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 724>,
-                                <&cpg CPG_MOD 723>,
-                                <&cpg CPG_MOD 722>,
-                                <&cpg CPG_MOD 721>;
+                       clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
+                                <&cpg CPG_MOD 722>, <&cpg CPG_MOD 721>;
                        clock-names = "du.0", "du.1", "du.2", "du.3";
+                       resets = <&cpg 724>, <&cpg 722>;
+                       reset-names = "du.0", "du.2";
 
                        renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>, <&cmm3>;
                        renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>,
index ea03b91..3128236 100644 (file)
                        interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 724>,
-                                <&cpg CPG_MOD 723>,
+                       clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
                                 <&cpg CPG_MOD 722>;
                        clock-names = "du.0", "du.1", "du.2";
+                       resets = <&cpg 724>, <&cpg 722>;
+                       reset-names = "du.0", "du.2";
 
                        renesas,cmms = <&cmm0>, <&cmm1>, <&cmm2>;
                        renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>;
index 1a20ebe..f746882 100644 (file)
                        interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 724>,
-                                <&cpg CPG_MOD 723>,
+                       clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
                                 <&cpg CPG_MOD 721>;
                        clock-names = "du.0", "du.1", "du.3";
+                       resets = <&cpg 724>, <&cpg 722>;
+                       reset-names = "du.0", "du.3";
 
                        renesas,cmms = <&cmm0>, <&cmm1>, <&cmm3>;
                        renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>;
index dbf1c67..a009c0e 100644 (file)
                        clock-names = "du.0";
                        power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
                        resets = <&cpg 724>;
+                       reset-names = "du.0";
                        renesas,vsps = <&vspd0 0>;
 
                        status = "disabled";
index 9444347..e01b050 100644 (file)
                        clock-names = "du.0";
                        power-domains = <&sysc R8A77980_PD_ALWAYS_ON>;
                        resets = <&cpg 724>;
+                       reset-names = "du.0";
                        renesas,vsps = <&vspd0 0>;
 
                        status = "disabled";
index c05ee98..0ad20b7 100644 (file)
                        reg = <0 0xfeb00000 0 0x40000>;
                        interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 724>,
-                                <&cpg CPG_MOD 723>;
+                       clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
                        clock-names = "du.0", "du.1";
                        resets = <&cpg 724>;
                        reset-names = "du.0";
index 7d3102d..e8d2290 100644 (file)
                        reg = <0 0xfeb00000 0 0x40000>;
                        interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&cpg CPG_MOD 724>,
-                                <&cpg CPG_MOD 723>;
+                       clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
                        clock-names = "du.0", "du.1";
                        resets = <&cpg 724>;
                        reset-names = "du.0";