Add Ivybridge support to intel_gpu_dump and the BLT tests.

diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index a2f9ae7..111f65d 100644 (file)
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -108,7 +108,7 @@ intel_batchbuffer_flush(struct intel_batchbuffer *batch)
        batch->ptr = NULL;
 
        ring = 0;
-       if (IS_GEN6(batch->devid))
+       if (HAS_BLT_RING(batch->devid))
                ring = I915_EXEC_BLT;
        ret = drm_intel_bo_mrb_exec(batch->bo, used, NULL, 0, 0, ring);
        assert(ret == 0);

diff --git a/lib/intel_chipset.h b/lib/intel_chipset.h
index c4cb820..c3db3ab 100755 (executable)
--- a/lib/intel_chipset.h
+++ b/lib/intel_chipset.h
@@ -90,7 +90,9 @@
                                 devid == PCI_CHIP_I945_GME || \
                                 devid == PCI_CHIP_I965_GM || \
                                 devid == PCI_CHIP_I965_GME || \
-                                devid == PCI_CHIP_GM45_GM || IS_IGD(devid))
+                                devid == PCI_CHIP_GM45_GM || IS_IGD(devid) || \
+                                devid == PCI_CHIP_IVYBRIDGE_M_GT1 ||   \
+                                devid == PCI_CHIP_IVYBRIDGE_M_GT2)
 
 #define IS_G45(devid)           (devid == PCI_CHIP_IGD_E_G || \
                                  devid == PCI_CHIP_Q45_G || \
@@ -163,3 +165,6 @@
 #define HAS_PCH_SPLIT(devid)   (IS_GEN5(devid) ||      \
                                 IS_GEN6(devid) ||      \
                                 IS_GEN7(devid))
+
+#define HAS_BLT_RING(devid)    (IS_GEN6(devid) || \
+                                IS_GEN7(devid))

diff --git a/tests/gem_exec_blt.c b/tests/gem_exec_blt.c
index 9ea4c4e..19eb716 100644 (file)
--- a/tests/gem_exec_blt.c
+++ b/tests/gem_exec_blt.c
@@ -253,7 +253,7 @@ static void run(int object_size)
        exec[2].rsvd2 = 0;
 
        ring = 0;
-       if (IS_GEN6(intel_get_drm_devid(fd)))
+       if (HAS_BLT_RING(intel_get_drm_devid(fd)))
                ring = I915_EXEC_BLT;
 
        execbuf.buffers_ptr = (uintptr_t)exec;

diff --git a/tests/gem_linear_blits.c b/tests/gem_linear_blits.c
index b408f8d..ae188ff 100644 (file)
--- a/tests/gem_linear_blits.c
+++ b/tests/gem_linear_blits.c
@@ -189,7 +189,7 @@ copy(int fd, uint32_t dst, uint32_t src)
        exec.DR1 = exec.DR4 = 0;
        exec.num_cliprects = 0;
        exec.cliprects_ptr = 0;
-       exec.flags = IS_GEN6(intel_get_drm_devid(fd)) ? I915_EXEC_BLT : 0;
+       exec.flags = HAS_BLT_RING(intel_get_drm_devid(fd)) ? I915_EXEC_BLT : 0;
        exec.rsvd1 = exec.rsvd2 = 0;
 
        ret = drmIoctl(fd, DRM_IOCTL_I915_GEM_EXECBUFFER2, &exec);

diff --git a/tools/intel_gpu_dump.c b/tools/intel_gpu_dump.c
index 0049f64..74acd3d 100644 (file)
--- a/tools/intel_gpu_dump.c
+++ b/tools/intel_gpu_dump.c
@@ -328,7 +328,7 @@ main (int argc, char *argv[])
        printf("ESR: 0x%08x\n", INREG(ESR));
        printf("PGTBL_ER: 0x%08x\n", INREG(PGTBL_ER));
 
-       if (IS_GEN6(devid)) {
+       if (IS_GEN6(devid) || IS_GEN7(devid)) {
            instdone = INREG(GEN6_INSTDONE_1);
            instdone1 = INREG(GEN6_INSTDONE_2);