The PCIe PLL locking may be unreliable under some circumstance, such as
high or low temperature. If the PLL fails to lock, reset it a try again.
This helps on the S905X4
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
[commit message amend]
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Link: https://lore.kernel.org/r/cc80cda0-4dda-2e3e-3fc8-afa97717479b@gmail.com
static int meson_clk_pcie_pll_enable(struct clk_hw *hw)
{
- meson_clk_pll_init(hw);
+ int retries = 10;
- if (meson_clk_pll_wait_lock(hw))
- return -EIO;
+ do {
+ meson_clk_pll_init(hw);
+ if (!meson_clk_pll_wait_lock(hw))
+ return 0;
+ pr_info("Retry enabling PCIe PLL clock\n");
+ } while (--retries);
- return 0;
+ return -EIO;
}
static int meson_clk_pll_enable(struct clk_hw *hw)