media: imx: imx7_mipi_csis: Fully initialize MIPI_CSIS_DPHYCTRL register
authorLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Mon, 15 Feb 2021 04:27:36 +0000 (05:27 +0100)
committerMauro Carvalho Chehab <mchehab+huawei@kernel.org>
Thu, 11 Mar 2021 10:59:53 +0000 (11:59 +0100)
When setting the CSIS parameters, write the MIPI_CSIS_DPHYCTRL register
fully instead of modifying selected fields, as the register doesn't
contain any reserved fields that need to be preserved. This simplifies
initialization slightly, and ensures that the register value doesn't
depend on its previous state (before a warm reboot for instance).

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Rui Miguel Silva <rmfrfs@gmail.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
drivers/staging/media/imx/imx7-mipi-csis.c

index 597d7db..a059bee 100644 (file)
@@ -536,10 +536,8 @@ static void mipi_csis_set_params(struct csi_state *state)
 
        __mipi_csis_set_format(state);
 
-       val = mipi_csis_read(state, MIPI_CSIS_DPHYCTRL);
-       val = (val & ~MIPI_CSIS_DPHYCTRL_HSSETTLE_MASK)
-           | MIPI_CSIS_DPHYCTRL_HSSETTLE(state->hs_settle);
-       mipi_csis_write(state, MIPI_CSIS_DPHYCTRL, val);
+       mipi_csis_write(state, MIPI_CSIS_DPHYCTRL,
+                       MIPI_CSIS_DPHYCTRL_HSSETTLE(state->hs_settle));
 
        val = (0 << MIPI_CSIS_ISPSYNC_HSYNC_LINTV_OFFSET) |
                (0 << MIPI_CSIS_ISPSYNC_VSYNC_SINTV_OFFSET) |