i965: Add INTEL_DEBUG=perf for failure to compile 16-wide shaders.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index e8ee0cb..334a14c 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -2096,7 +2096,10 @@ brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_compile *c,
       c->dispatch_width = 16;
       fs_visitor v2(c, prog, shader);
       v2.import_uniforms(&v);
-      v2.run();
+      if (!v2.run()) {
+         perf_debug("16-wide shader failed to compile, falling back to "
+                    "8-wide at a 10-20%% performance cost: %s", v2.fail_msg);
+      }
    }
 
    c->prog_data.dispatch_width = 8;

diff --git a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
index 7618047..e7f11ae 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_reg_allocate.cpp
@@ -238,7 +238,8 @@ fs_visitor::assign_regs()
       if (reg == -1) {
         fail("no register to spill\n");
       } else if (c->dispatch_width == 16) {
-        fail("no spilling support on 16-wide yet\n");
+        fail("Failure to register allocate.  Reduce number of live scalar "
+              "values to avoid this.");
       } else {
         spill_reg(reg);
       }

diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h
index 49db119..063cc34 100644 (file)
--- a/src/mesa/drivers/dri/intel/intel_context.h
+++ b/src/mesa/drivers/dri/intel/intel_context.h
@@ -464,6 +464,11 @@ extern int INTEL_DEBUG;
                printf(__VA_ARGS__);                            \
 } while(0)
 
+#define perf_debug(...) do {                                   \
+       if (unlikely(INTEL_DEBUG & DEBUG_PERF))                 \
+               printf(__VA_ARGS__);                            \
+} while(0)
+
 #define PCI_CHIP_845_G                 0x2562
 #define PCI_CHIP_I830_M                        0x3577
 #define PCI_CHIP_I855_GM               0x3582