perf/x86/intel/uncore: Correct fixed counter index check for NHM

For Nehalem and Westmere, there is only one fixed counter for W-Box.
There is no index which is bigger than UNCORE_PMC_IDX_FIXED.
It is not correct to use >= to check fixed counter.
The code quality issue will bring problem when new counter index is
introduced.

Signed-off-by: Kan Liang <kan.liang@intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: acme@kernel.org
Cc: eranian@google.com
Link: http://lkml.kernel.org/r/1525371913-10597-2-git-send-email-kan.liang@intel.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>

diff --git a/arch/x86/events/intel/uncore_nhmex.c b/arch/x86/events/intel/uncore_nhmex.c
index 93e7a83..173e267 100644 (file)
--- a/arch/x86/events/intel/uncore_nhmex.c
+++ b/arch/x86/events/intel/uncore_nhmex.c
@@ -246,7 +246,7 @@ static void nhmex_uncore_msr_enable_event(struct intel_uncore_box *box, struct p
 {
        struct hw_perf_event *hwc = &event->hw;
 
-       if (hwc->idx >= UNCORE_PMC_IDX_FIXED)
+       if (hwc->idx == UNCORE_PMC_IDX_FIXED)
                wrmsrl(hwc->config_base, NHMEX_PMON_CTL_EN_BIT0);
        else if (box->pmu->type->event_mask & NHMEX_PMON_CTL_EN_BIT0)
                wrmsrl(hwc->config_base, hwc->config | NHMEX_PMON_CTL_EN_BIT22);