rockchip: px30: add support for SFC for Odroid Go Advance
authorChris Morgan <macromorgan@hotmail.com>
Thu, 5 Aug 2021 08:27:52 +0000 (16:27 +0800)
committerKever Yang <kever.yang@rock-chips.com>
Thu, 12 Aug 2021 01:34:11 +0000 (09:34 +0800)
The Odroid Go Advance uses a Rockchip Serial Flash Controller with an
XT25F128B SPI NOR flash chip. This adds support for both. Note that
while both the controller and chip support quad mode, only two lines
are connected to the chip. Changing the pinctrl to bus2 and setting tx
and rx lines to 2 for this reason.

Signed-off-by: Chris Morgan <macromorgan@hotmail.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
arch/arm/dts/rk3326-odroid-go2-u-boot.dtsi
arch/arm/dts/rk3326-odroid-go2.dts

index 00767d2..741e8dd 100644 (file)
@@ -7,6 +7,15 @@
        chosen {
                u-boot,spl-boot-order = &sdmmc;
        };
+
+       aliases {
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               mmc0 = &sdmmc;
+               serial1 = &uart1;
+               serial2 = &uart2;
+               spi0 = &sfc;
+       };
 };
 
 &cru {
        u-boot,spl-fifo-mode;
 };
 
+&sfc {
+       u-boot,dm-pre-reloc;
+};
+
+&spi_flash {
+       u-boot,dm-pre-reloc;
+};
+
 &uart1 {
        clock-frequency = <24000000>;
        u-boot,dm-pre-reloc;
index 8cd4688..6f91f50 100644 (file)
        status = "okay";
 };
 
+&sfc {
+       #address-cells = <1>;
+       #size-cells = <0>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&sfc_clk &sfc_cs &sfc_bus2>;
+       status = "okay";
+
+       spi_flash: xt25f128b@0 {
+               compatible = "jedec,spi-nor";
+               reg = <0>;
+               spi-max-frequency = <108000000>;
+               spi-rx-bus-width = <2>;
+               spi-tx-bus-width = <2>;
+       };
+};
+
 &tsadc {
        status = "okay";
 };