arm64: dts: ti: k3-j721s2-main: Add main CPSW2G devicetree node

TI's J721S2 SoC has a MAIN CPSW2G instance of the CPSW Ethernet Switch.
Add devicetree node for it.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Link: https://lore.kernel.org/r/20230726065407.378455-2-s-vadapalli@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>

diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
index 2fb90b8..6e3fb86 100644 (file)
--- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
@@ -51,6 +51,12 @@
                        mux-reg-masks = <0x0 0x8000000>; /* USB0 to SERDES0 lane 1/3 mux */
                };
 
+               phy_gmii_sel_cpsw: phy@34 {
+                       compatible = "ti,am654-phy-gmii-sel";
+                       reg = <0x34 0x4>;
+                       #phy-cells = <1>;
+               };
+
                serdes_ln_ctrl: mux-controller@80 {
                        compatible = "mmio-mux";
                        reg = <0x80 0x10>;
@@ -1105,6 +1111,69 @@
                };
        };
 
+       main_cpsw: ethernet@c200000 {
+               compatible = "ti,j721e-cpsw-nuss";
+               reg = <0x00 0xc200000 0x00 0x200000>;
+               reg-names = "cpsw_nuss";
+               ranges = <0x0 0x0 0x0 0xc200000 0x0 0x200000>;
+               #address-cells = <2>;
+               #size-cells = <2>;
+               dma-coherent;
+               clocks = <&k3_clks 28 28>;
+               clock-names = "fck";
+               power-domains = <&k3_pds 28 TI_SCI_PD_EXCLUSIVE>;
+
+               dmas = <&main_udmap 0xc640>,
+                      <&main_udmap 0xc641>,
+                      <&main_udmap 0xc642>,
+                      <&main_udmap 0xc643>,
+                      <&main_udmap 0xc644>,
+                      <&main_udmap 0xc645>,
+                      <&main_udmap 0xc646>,
+                      <&main_udmap 0xc647>,
+                      <&main_udmap 0x4640>;
+               dma-names = "tx0", "tx1", "tx2", "tx3",
+                           "tx4", "tx5", "tx6", "tx7",
+                           "rx";
+
+               status = "disabled";
+
+               ethernet-ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       main_cpsw_port1: port@1 {
+                               reg = <1>;
+                               ti,mac-only;
+                               label = "port1";
+                               phys = <&phy_gmii_sel_cpsw 1>;
+                               status = "disabled";
+                       };
+               };
+
+               main_cpsw_mdio: mdio@f00 {
+                       compatible = "ti,cpsw-mdio","ti,davinci_mdio";
+                       reg = <0x00 0xf00 0x00 0x100>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       clocks = <&k3_clks 28 28>;
+                       clock-names = "fck";
+                       bus_freq = <1000000>;
+                       status = "disabled";
+               };
+
+               cpts@3d000 {
+                       compatible = "ti,am65-cpts";
+                       reg = <0x00 0x3d000 0x00 0x400>;
+                       clocks = <&k3_clks 28 3>;
+                       clock-names = "cpts";
+                       interrupts-extended = <&gic500 GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "cpts";
+                       ti,cpts-ext-ts-inputs = <4>;
+                       ti,cpts-periodic-outputs = <2>;
+               };
+       };
+
        usbss0: cdns-usb@4104000 {
                compatible = "ti,j721e-usb";
                reg = <0x00 0x04104000 0x00 0x100>;