#define VE_INTERRUPT_VSYNC_DESC BIT(11)
#define VE_MODE_DETECT 0x30c
+#define VE_MODE_DT_HOR_TOLER GENMASK(31, 28)
+#define VE_MODE_DT_VER_TOLER GENMASK(27, 24)
+#define VE_MODE_DT_HOR_STABLE GENMASK(23, 20)
+#define VE_MODE_DT_VER_STABLE GENMASK(19, 16)
+#define VE_MODE_DT_EDG_THROD GENMASK(15, 8)
+
#define VE_MEM_RESTRICT_START 0x310
#define VE_MEM_RESTRICT_END 0x314
aspeed_video_write(video, VE_SCALING_FILTER3, 0x00200000);
/* Set mode detection defaults */
- aspeed_video_write(video, VE_MODE_DETECT, 0x22666500);
+ aspeed_video_write(video, VE_MODE_DETECT,
+ FIELD_PREP(VE_MODE_DT_HOR_TOLER, 2) |
+ FIELD_PREP(VE_MODE_DT_VER_TOLER, 2) |
+ FIELD_PREP(VE_MODE_DT_HOR_STABLE, 6) |
+ FIELD_PREP(VE_MODE_DT_VER_STABLE, 6) |
+ FIELD_PREP(VE_MODE_DT_EDG_THROD, 0x65));
}
static void aspeed_video_start(struct aspeed_video *video)