2018-07-05 Tamar Christina <tamar.christina@arm.com>
+ PR target/84711
+ * rtlanal.c (set_noop_p): Constrain on mode change,
+ include hard-reg-set.h
+
+2018-07-05 Tamar Christina <tamar.christina@arm.com>
+
* config/aarch64/aarch64.c (aarch64_expand_movmem): Fix mode size.
2018-07-05 Jakub Jelinek <jakub@redhat.com>
#include "recog.h"
#include "addresses.h"
#include "rtl-iter.h"
+#include "hard-reg-set.h"
/* Forward declarations */
static void set_of_1 (rtx, const_rtx, void *);
if (maybe_ne (rtx_to_poly_int64 (XVECEXP (par, 0, i)), c0 + i))
return 0;
return
- simplify_subreg_regno (REGNO (src0), GET_MODE (src0),
- offset, GET_MODE (dst)) == (int) REGNO (dst);
+ REG_CAN_CHANGE_MODE_P (REGNO (dst), GET_MODE (src0), GET_MODE (dst))
+ && simplify_subreg_regno (REGNO (src0), GET_MODE (src0),
+ offset, GET_MODE (dst)) == (int) REGNO (dst);
}
return (REG_P (src) && REG_P (dst)
2018-07-05 Tamar Christina <tamar.christina@arm.com>
+ PR target/84711
+ * gcc.dg/vect/pr84711.c: New.
+
+2018-07-05 Tamar Christina <tamar.christina@arm.com>
+
* gcc.target/aarch64/struct_cpy.c: New.
2018-07-05 Christophe Lyon <christophe.lyon@linaro.org>
--- /dev/null
+/* { dg-do compile } */
+/* { dg-require-effective-target vect_int } */
+/* { dg-options "-O2" } */
+
+typedef int v4si
+ __attribute__ ((vector_size (16)));
+
+int fn1 (v4si p)
+{
+ return p[0];
+}
+