MIPS: OCTEON: Fix FP context save.
authorDavid Daney <david.daney@cavium.com>
Thu, 15 Jan 2015 13:11:06 +0000 (16:11 +0300)
committerRalf Baechle <ralf@linux-mips.org>
Fri, 20 Feb 2015 14:28:51 +0000 (15:28 +0100)
It wasn't being saved on task switch.

Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8934/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/kernel/octeon_switch.S

index 3dec1e8..2787c01 100644 (file)
        /*
         * check if we need to save FPU registers
         */
-       PTR_L   t3, TASK_THREAD_INFO(a0)
-       LONG_L  t0, TI_FLAGS(t3)
-       li      t1, _TIF_USEDFPU
-       and     t2, t0, t1
-       beqz    t2, 1f
-       nor     t1, zero, t1
-
-       and     t0, t0, t1
-       LONG_S  t0, TI_FLAGS(t3)
+       .set push
+       .set noreorder
+       beqz    a3, 1f
+        PTR_L  t3, TASK_THREAD_INFO(a0)
+       .set pop
 
        /*
         * clear saved user stack CU1 bit
 1:
 
        /* check if we need to save COP2 registers */
-       PTR_L   t2, TASK_THREAD_INFO(a0)
-       LONG_L  t0, ST_OFF(t2)
+       LONG_L  t0, ST_OFF(t3)
        bbit0   t0, 30, 1f
 
        /* Disable COP2 in the stored process state */
        li      t1, ST0_CU2
        xor     t0, t1
-       LONG_S  t0, ST_OFF(t2)
+       LONG_S  t0, ST_OFF(t3)
 
        /* Enable COP2 so we can save it */
        mfc0    t0, CP0_STATUS