The blsr pattern here is missed because the add is shrunk, but the and is not. This leaves an any_extend between them.
llvm-svn: 324986
ret i64 %r
}
+; The add here gets shrunk, but the and does not thus hiding the blsr pattern.
+define i64 @blsr_disguised_shrunk_add(i64 %x) {
+; CHECK-LABEL: blsr_disguised_shrunk_add:
+; CHECK: # %bb.0:
+; CHECK-NEXT: shrq $48, %rdi
+; CHECK-NEXT: leal -1(%rdi), %eax
+; CHECK-NEXT: andq %rdi, %rax
+; CHECK-NEXT: retq
+ %a = lshr i64 %x, 48
+ %b = add i64 %a, -1
+ %c = and i64 %b, %a
+ ret i64 %c
+}