ARM: socfpga: Remove adhoc ethernet reset and configuration

Remove ad-hoc ethernet syscon registers configuration and reset support.
Reset is now handled by the reset framework and the syscon registers are
set in the dwmac_socfpga.c driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 63ec024..9f5eaf8 100644 (file)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -772,7 +772,7 @@ config ARCH_SNAPDRAGON
 config ARCH_SOCFPGA
        bool "Altera SOCFPGA family"
        select ARCH_EARLY_INIT_R
-       select ARCH_MISC_INIT
+       select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
        select ARM64 if TARGET_SOCFPGA_STRATIX10
        select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
        select DM

diff --git a/arch/arm/mach-socfpga/Kconfig b/arch/arm/mach-socfpga/Kconfig
index 63ce32f..80be1dc 100644 (file)
--- a/arch/arm/mach-socfpga/Kconfig
+++ b/arch/arm/mach-socfpga/Kconfig
@@ -14,6 +14,11 @@ config TARGET_SOCFPGA_ARRIA10
        select DM_I2C
        select DM_RESET
        select SPL_DM_RESET if SPL
+       select REGMAP
+       select SPL_REGMAP if SPL
+       select SYSCON
+       select SPL_SYSCON if SPL
+       select ETH_DESIGNWARE_SOCFPGA
 
 config TARGET_SOCFPGA_CYCLONE5
        bool

diff --git a/arch/arm/mach-socfpga/misc_arria10.c b/arch/arm/mach-socfpga/misc_arria10.c
index b599530..284e076 100644 (file)
--- a/arch/arm/mach-socfpga/misc_arria10.c
+++ b/arch/arm/mach-socfpga/misc_arria10.c
@@ -38,48 +38,6 @@ static const struct socfpga_noc_fw_ocram *noc_fw_ocram_base =
 static struct socfpga_system_manager *sysmgr_regs =
        (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS;
 
-/*
- * DesignWare Ethernet initialization
- */
-#ifdef CONFIG_ETH_DESIGNWARE
-static void arria10_dwmac_reset(const u8 of_reset_id, const u8 phymode)
-{
-       u32 reset;
-
-       if (of_reset_id == EMAC0_RESET) {
-               reset = SOCFPGA_RESET(EMAC0);
-       } else if (of_reset_id == EMAC1_RESET) {
-               reset = SOCFPGA_RESET(EMAC1);
-       } else if (of_reset_id == EMAC2_RESET) {
-               reset = SOCFPGA_RESET(EMAC2);
-       } else {
-               printf("GMAC: Invalid reset ID (%i)!\n", of_reset_id);
-               return;
-       }
-
-       clrsetbits_le32(&sysmgr_regs->emac[of_reset_id - EMAC0_RESET],
-                       SYSMGR_EMACGRP_CTRL_PHYSEL_MASK,
-                       phymode);
-
-       /* Release the EMAC controller from reset */
-       socfpga_per_reset(reset, 0);
-}
-
-static int socfpga_eth_reset(void)
-{
-       /* Put all GMACs into RESET state. */
-       socfpga_per_reset(SOCFPGA_RESET(EMAC0), 1);
-       socfpga_per_reset(SOCFPGA_RESET(EMAC1), 1);
-       socfpga_per_reset(SOCFPGA_RESET(EMAC2), 1);
-       return socfpga_eth_reset_common(arria10_dwmac_reset);
-};
-#else
-static int socfpga_eth_reset(void)
-{
-       return 0;
-};
-#endif
-
 #if defined(CONFIG_SPL_BUILD)
 /*
 + * This function initializes security policies to be consistent across
@@ -143,13 +101,6 @@ int print_cpuinfo(void)
 }
 #endif
 
-#ifdef CONFIG_ARCH_MISC_INIT
-int arch_misc_init(void)
-{
-       return socfpga_eth_reset();
-}
-#endif
-
 void do_bridge_reset(int enable)
 {
        if (enable)