Revert "[ARM] Mark LEApcrel instructions as isAsCheapAsAMove"

Revert "[ARM] Mark LEApcrel as not having side effects"

This reverts commit r303054 and r303053, as they broke the ARM
self-hosting buildbots:

http://lab.llvm.org:8011/builders/clang-cmake-thumbv7-a15-full-sh/builds/1550

http://lab.llvm.org:8011/builders/clang-cmake-armv7-a15-selfhost-neon/builds/1349

http://lab.llvm.org:8011/builders/clang-cmake-armv7-a15-selfhost/builds/1845

Offline investigation on course.

llvm-svn: 303193

diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td
index 5b7666a..d06b7d0 100644 (file)
--- a/llvm/lib/Target/ARM/ARMInstrInfo.td
+++ b/llvm/lib/Target/ARM/ARMInstrInfo.td
@@ -2222,14 +2222,14 @@ def ADR : AI1<{0,?,?,0}, (outs GPR:$Rd), (ins adrlabel:$label),
   let Inst{11-0} = label{11-0};
 }
 
-let hasSideEffects = 0, isReMaterializable = 1, isAsCheapAsAMove = 1 in
+let hasSideEffects = 1 in {
 def LEApcrel : ARMPseudoInst<(outs GPR:$Rd), (ins i32imm:$label, pred:$p),
                     4, IIC_iALUi, []>, Sched<[WriteALU, ReadALU]>;
 
-let hasSideEffects = 1 in
 def LEApcrelJT : ARMPseudoInst<(outs GPR:$Rd),
                       (ins i32imm:$label, pred:$p),
                       4, IIC_iALUi, []>, Sched<[WriteALU, ReadALU]>;
+}
 
 //===----------------------------------------------------------------------===//
 //  Control Flow Instructions.

diff --git a/llvm/lib/Target/ARM/ARMInstrThumb.td b/llvm/lib/Target/ARM/ARMInstrThumb.td
index 118627f..bee83df 100644 (file)
--- a/llvm/lib/Target/ARM/ARMInstrThumb.td
+++ b/llvm/lib/Target/ARM/ARMInstrThumb.td
@@ -1402,7 +1402,7 @@ def tADR : T1I<(outs tGPR:$Rd), (ins t_adrlabel:$addr, pred:$p),
   let DecoderMethod = "DecodeThumbAddSpecialReg";
 }
 
-let hasSideEffects = 0, isReMaterializable = 1, isAsCheapAsAMove = 1 in
+let hasSideEffects = 0, isReMaterializable = 1 in
 def tLEApcrel   : tPseudoInst<(outs tGPR:$Rd), (ins i32imm:$label, pred:$p),
                               2, IIC_iALUi, []>, Sched<[WriteALU]>;
 

diff --git a/llvm/lib/Target/ARM/ARMInstrThumb2.td b/llvm/lib/Target/ARM/ARMInstrThumb2.td
index 842c46c..bf3d820 100644 (file)
--- a/llvm/lib/Target/ARM/ARMInstrThumb2.td
+++ b/llvm/lib/Target/ARM/ARMInstrThumb2.td
@@ -1227,7 +1227,7 @@ def t2ADR : T2PCOneRegImm<(outs rGPR:$Rd),
   let DecoderMethod = "DecodeT2Adr";
 }
 
-let hasSideEffects = 0, isReMaterializable = 1, isAsCheapAsAMove = 1 in
+let hasSideEffects = 0, isReMaterializable = 1 in
 def t2LEApcrel   : t2PseudoInst<(outs rGPR:$Rd), (ins i32imm:$label, pred:$p),
                                 4, IIC_iALUi, []>, Sched<[WriteALU, ReadALU]>;
 let hasSideEffects = 1 in

diff --git a/llvm/test/CodeGen/ARM/adr-hoist.ll b/llvm/test/CodeGen/ARM/adr-hoist.ll
deleted file mode 100644 (file)
index ddf6cea..0000000
--- a/llvm/test/CodeGen/ARM/adr-hoist.ll
+++ /dev/null
@@ -1,31 +0,0 @@
-; RUN: llc -mtriple=armv7a   %s -o - | FileCheck %s
-; RUN: llc -mtriple=thumbv7m %s -o - | FileCheck %s
-; RUN: llc -mtriple=thumbv6m %s -o - | FileCheck %s
-
-@arr = internal unnamed_addr constant [4 x i32] [i32 305419896, i32 -1430532899, i32 -2023406815, i32 -573785174], align 4
-
-; Check that the adr of arr is hoisted out of the loop
-; CHECK: adr [[REG:r[0-9]+]], .LCP
-; CHECK: .LBB
-; CHECK-NOT adr
-; CHECK: ldr{{(.w)?}} {{r[0-9]+}}, {{\[}}[[REG]],
-
-define void @fn(i32 %n, i32* %p) {
-entry:
-  %cmp8 = icmp sgt i32 %n, 0
-  br i1 %cmp8, label %for.body, label %for.cond.cleanup
-
-for.body:
-  %i.09 = phi i32 [ %inc, %for.body ], [ 0, %entry ]
-  %arrayidx = getelementptr inbounds i32, i32* %p, i32 %i.09
-  %0 = load i32, i32* %arrayidx, align 4
-  %arrayidx1 = getelementptr inbounds [4 x i32], [4 x i32]* @arr, i32 0, i32 %0
-  %1 = load i32, i32* %arrayidx1, align 4
-  store i32 %1, i32* %arrayidx, align 4
-  %inc = add nuw nsw i32 %i.09, 1
-  %exitcond = icmp eq i32 %inc, %n
-  br i1 %exitcond, label %for.cond.cleanup, label %for.body
-
-for.cond.cleanup:
-  ret void
-}

diff --git a/llvm/test/CodeGen/ARM/adr-remat.ll b/llvm/test/CodeGen/ARM/adr-remat.ll
deleted file mode 100644 (file)
index 15d7f9c..0000000
--- a/llvm/test/CodeGen/ARM/adr-remat.ll
+++ /dev/null
@@ -1,25 +0,0 @@
-; RUN: llc -mtriple=armv7a   %s -o - | FileCheck %s
-; RUN: llc -mtriple=thumbv7m %s -o - | FileCheck %s
-; RUN: llc -mtriple=thumbv6m %s -o - | FileCheck %s
-
-@str.1 = private unnamed_addr constant [58 x i8] c"+-------------------------------------------------------+\00"
-@str.2 = private unnamed_addr constant [58 x i8] c"|                                                       |\00"
-
-declare i32 @puts(i8* nocapture readonly)
-
-; Check that we rematerialize the adr of str.1 instead of doing one adr and two
-; movs.
-
-; CHECK: adr r0, [[STR1:.LCPI[0-9]+_[0-9]+]]
-; CHECK: bl puts
-; CHECK: adr r0, {{.LCPI[0-9]+_[0-9]+}}
-; CHECK: bl puts
-; CHECK: adr r0, [[STR1]]
-; CHECK: b{{l?}} puts
-define void @fn() {
-entry:
-  %puts1 = tail call i32 @puts(i8* getelementptr inbounds ([58 x i8], [58 x i8]* @str.1, i32 0, i32 0))
-  %puts2 = tail call i32 @puts(i8* getelementptr inbounds ([58 x i8], [58 x i8]* @str.2, i32 0, i32 0))
-  %puts3 = tail call i32 @puts(i8* getelementptr inbounds ([58 x i8], [58 x i8]* @str.1, i32 0, i32 0))
-  ret void
-}

diff --git a/llvm/test/CodeGen/ARM/align-sp-adjustment.ll b/llvm/test/CodeGen/ARM/align-sp-adjustment.ll
index 091279e..cce7b03 100644 (file)
--- a/llvm/test/CodeGen/ARM/align-sp-adjustment.ll
+++ b/llvm/test/CodeGen/ARM/align-sp-adjustment.ll
@@ -1,10 +1,6 @@
 ; RUN: llc -mtriple=thumbv7 -o - %s | FileCheck %s
 
-; p5 will have been pushed to the stack. Check that it's correctly aligned by
-; looking at the offset of the instruction that loads it. Note that this is
-; very fragile and this test may need to be updated if we happen to spill more
-; or less to the stack.
-; CHECK: ldr{{(.w)?}} r{{[0-9]+}}, [sp, #2104]
+; CHECK: [sp, #2120]
 
 %struct.struct_2 = type { [172 x %struct.struct_1] }
 %struct.struct_1 = type { i32, i32, i32 }