* published by the Free Software Foundation.
*/
+#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/gpio.h>
struct mutex power_lock; /* lock to protect power_count */
int power_count;
+ struct clk *clk;
struct regulator *vaa;
struct regulator *vdd;
struct regulator *vdd_io;
0);
}
-static int mt9p031_pll_setup(struct mt9p031 *mt9p031)
+static int mt9p031_clk_setup(struct mt9p031 *mt9p031)
{
static const struct aptina_pll_limits limits = {
.ext_clock_min = 6000000,
struct i2c_client *client = v4l2_get_subdevdata(&mt9p031->subdev);
struct mt9p031_platform_data *pdata = mt9p031->pdata;
+ mt9p031->clk = devm_clk_get(&client->dev, NULL);
+ if (IS_ERR(mt9p031->clk))
+ return PTR_ERR(mt9p031->clk);
+
+ clk_set_rate(mt9p031->clk, pdata->ext_freq);
+
mt9p031->pll.ext_clock = pdata->ext_freq;
mt9p031->pll.pix_clock = pdata->target_freq;
regulator_enable(mt9p031->vaa);
/* Emable clock */
- if (mt9p031->pdata->set_xclk)
- mt9p031->pdata->set_xclk(&mt9p031->subdev,
- mt9p031->pdata->ext_freq);
+ if (mt9p031->clk)
+ clk_prepare_enable(mt9p031->clk);
/* Now RESET_BAR must be high */
if (mt9p031->reset != -1) {
regulator_disable(mt9p031->vdd_io);
regulator_disable(mt9p031->vdd);
- if (mt9p031->pdata->set_xclk)
- mt9p031->pdata->set_xclk(&mt9p031->subdev, 0);
+ if (mt9p031->clk)
+ clk_disable_unprepare(mt9p031->clk);
}
static int __mt9p031_set_power(struct mt9p031 *mt9p031, bool on)
mt9p031->reset = pdata->reset;
}
- ret = mt9p031_pll_setup(mt9p031);
+ ret = mt9p031_clk_setup(mt9p031);
done:
if (ret < 0) {
/*
* struct mt9p031_platform_data - MT9P031 platform data
- * @set_xclk: Clock frequency set callback
* @reset: Chip reset GPIO (set to -1 if not used)
* @ext_freq: Input clock frequency
* @target_freq: Pixel clock frequency
*/
struct mt9p031_platform_data {
- int (*set_xclk)(struct v4l2_subdev *subdev, int hz);
int reset;
int ext_freq;
int target_freq;