drm/i915/mtl: Update OA mux whitelist for MTL

0x20cc (WAIT_FOR_RC6_EXIT on other platforms) is repurposed on MTL. Use
a separate mux table to verify oa configs passed by user.

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20221212220902.1819159-4-umesh.nerlige.ramappa@intel.com

diff --git a/drivers/gpu/drm/i915/i915_perf.c b/drivers/gpu/drm/i915/i915_perf.c
index aedc4cf..b0ada4a 100644 (file)
--- a/drivers/gpu/drm/i915/i915_perf.c
+++ b/drivers/gpu/drm/i915/i915_perf.c
@@ -4321,6 +4321,17 @@ static const struct i915_range gen12_oa_mux_regs[] = {
        {}
 };
 
+/*
+ * Ref: 14010536224:
+ * 0x20cc is repurposed on MTL, so use a separate array for MTL.
+ */
+static const struct i915_range mtl_oa_mux_regs[] = {
+       { .start = 0x0d00, .end = 0x0d04 },     /* RPM_CONFIG[0-1] */
+       { .start = 0x0d0c, .end = 0x0d2c },     /* NOA_CONFIG[0-8] */
+       { .start = 0x9840, .end = 0x9840 },     /* GDT_CHICKEN_BITS */
+       { .start = 0x9884, .end = 0x9888 },     /* NOA_WRITE */
+};
+
 static bool gen7_is_valid_b_counter_addr(struct i915_perf *perf, u32 addr)
 {
        return reg_in_range_table(addr, gen7_oa_b_counters);
@@ -4364,7 +4375,10 @@ static bool xehp_is_valid_b_counter_addr(struct i915_perf *perf, u32 addr)
 
 static bool gen12_is_valid_mux_addr(struct i915_perf *perf, u32 addr)
 {
-       return reg_in_range_table(addr, gen12_oa_mux_regs);
+       if (IS_METEORLAKE(perf->i915))
+               return reg_in_range_table(addr, mtl_oa_mux_regs);
+       else
+               return reg_in_range_table(addr, gen12_oa_mux_regs);
 }
 
 static u32 mask_reg_value(u32 reg, u32 val)