+2018-11-05 Ilya Leoshkevich <iii@linux.ibm.com>
+
+ * gcc.target/s390/md/andc-splitter-1.c: Add colon to
+ expectations.
+ * gcc.target/s390/md/andc-splitter-2.c: Likewise.
+ * gcc.target/s390/md/setmem_long-1.c: Likewise.
+
2018-11-05 Richard Biener <rguenther@suse.de>
PR tree-optimization/87873
__attribute__ ((noinline))
unsigned long andc_vv(unsigned long a, unsigned long b)
{ return ~b & a; }
-/* { dg-final { scan-assembler ":16 .\* \{\\*anddi3\}" } } */
-/* { dg-final { scan-assembler ":16 .\* \{\\*xordi3\}" } } */
+/* { dg-final { scan-assembler ":16:.\* \{\\*anddi3\}" } } */
+/* { dg-final { scan-assembler ":16:.\* \{\\*xordi3\}" } } */
__attribute__ ((noinline))
unsigned long andc_pv(unsigned long *a, unsigned long b)
{ return ~b & *a; }
-/* { dg-final { scan-assembler ":22 .\* \{\\*anddi3\}" } } */
-/* { dg-final { scan-assembler ":22 .\* \{\\*xordi3\}" } } */
+/* { dg-final { scan-assembler ":22:.\* \{\\*anddi3\}" } } */
+/* { dg-final { scan-assembler ":22:.\* \{\\*xordi3\}" } } */
__attribute__ ((noinline))
unsigned long andc_vp(unsigned long a, unsigned long *b)
{ return ~*b & a; }
-/* { dg-final { scan-assembler ":28 .\* \{\\*anddi3\}" } } */
-/* { dg-final { scan-assembler ":28 .\* \{\\*xordi3\}" } } */
+/* { dg-final { scan-assembler ":28:.\* \{\\*anddi3\}" } } */
+/* { dg-final { scan-assembler ":28:.\* \{\\*xordi3\}" } } */
__attribute__ ((noinline))
unsigned long andc_pp(unsigned long *a, unsigned long *b)
{ return ~*b & *a; }
-/* { dg-final { scan-assembler ":34 .\* \{\\*anddi3\}" } } */
-/* { dg-final { scan-assembler ":34 .\* \{\\*xordi3\}" } } */
+/* { dg-final { scan-assembler ":34:.\* \{\\*anddi3\}" } } */
+/* { dg-final { scan-assembler ":34:.\* \{\\*xordi3\}" } } */
/* { dg-final { scan-assembler-times "\tngr\?k\?\t" 4 } } */
/* { dg-final { scan-assembler-times "\txgr\?\t" 4 } } */
__attribute__ ((noinline))
unsigned int andc_vv(unsigned int a, unsigned int b)
{ return ~b & a; }
-/* { dg-final { scan-assembler ":16 .\* \{\\*andsi3_\(esa\|zarch\)\}" } } */
-/* { dg-final { scan-assembler ":16 .\* \{\\*xorsi3\}" } } */
+/* { dg-final { scan-assembler ":16:.\* \{\\*andsi3_\(esa\|zarch\)\}" } } */
+/* { dg-final { scan-assembler ":16:.\* \{\\*xorsi3\}" } } */
__attribute__ ((noinline))
unsigned int andc_pv(unsigned int *a, unsigned int b)
{ return ~b & *a; }
-/* { dg-final { scan-assembler ":22 .\* \{\\*andsi3_\(esa\|zarch\)\}" } } */
-/* { dg-final { scan-assembler ":22 .\* \{\\*xorsi3\}" } } */
+/* { dg-final { scan-assembler ":22:.\* \{\\*andsi3_\(esa\|zarch\)\}" } } */
+/* { dg-final { scan-assembler ":22:.\* \{\\*xorsi3\}" } } */
__attribute__ ((noinline))
unsigned int andc_vp(unsigned int a, unsigned int *b)
{ return ~*b & a; }
-/* { dg-final { scan-assembler ":28 .\* \{\\*andsi3_\(esa\|zarch\)\}" } } */
-/* { dg-final { scan-assembler ":28 .\* \{\\*xorsi3\}" } } */
+/* { dg-final { scan-assembler ":28:.\* \{\\*andsi3_\(esa\|zarch\)\}" } } */
+/* { dg-final { scan-assembler ":28:.\* \{\\*xorsi3\}" } } */
__attribute__ ((noinline))
unsigned int andc_pp(unsigned int *a, unsigned int *b)
{ return ~*b & *a; }
-/* { dg-final { scan-assembler ":34 .\* \{\\*andsi3_\(esa\|zarch\)\}" } } */
-/* { dg-final { scan-assembler ":34 .\* \{\\*xorsi3\}" } } */
+/* { dg-final { scan-assembler ":34:.\* \{\\*andsi3_\(esa\|zarch\)\}" } } */
+/* { dg-final { scan-assembler ":34:.\* \{\\*xorsi3\}" } } */
/* { dg-final { scan-assembler-times "\tnr\?k\?\t" 4 } } */
/* { dg-final { scan-assembler-times "\txr\?k\?\t" 4 } } */
}
/* Check that the right patterns are used. */
-/* { dg-final { scan-assembler-times {c"?:16 .*{[*]setmem_long_?3?1?z?}} 1 } } */
-/* { dg-final { scan-assembler-times {c"?:22 .*{[*]setmem_long_and_?3?1?z?}} 1 } } */
+/* { dg-final { scan-assembler-times {c"?:16:.*{[*]setmem_long_?3?1?z?}} 1 } } */
+/* { dg-final { scan-assembler-times {c"?:22:.*{[*]setmem_long_and_?3?1?z?}} 1 } } */
#define LEN 500
char buf[LEN + 2];