for (i = 0; i < program->num_kernels; i++) {
LLVMModuleRef mod = radeon_llvm_get_kernel_module(program->llvm_ctx, i,
code, header->num_bytes);
- si_compile_llvm(sctx->screen, &program->kernels[i], mod);
+ si_compile_llvm(sctx->screen, &program->kernels[i], sctx->tm,
+ mod);
LLVMDisposeModule(mod);
}
}
si_pm4_cleanup(sctx);
r600_common_context_cleanup(&sctx->b);
+
+#if HAVE_LLVM >= 0x0306
+ LLVMDisposeTargetMachine(sctx->tm);
+#endif
+
FREE(sctx);
}
struct si_context *sctx = CALLOC_STRUCT(si_context);
struct si_screen* sscreen = (struct si_screen *)screen;
struct radeon_winsys *ws = sscreen->b.ws;
+ LLVMTargetRef r600_target;
+#if HAVE_LLVM >= 0x0306
+ const char *triple = "amdgcn--";
+#else
+ const char *triple = "r600--";
+#endif
int shader, i;
if (sctx == NULL)
*/
sctx->scratch_waves = 32 * sscreen->b.info.max_compute_units;
+#if HAVE_LLVM >= 0x0306
+ /* Initialize LLVM TargetMachine */
+ r600_target = radeon_llvm_get_r600_target(triple);
+ sctx->tm = LLVMCreateTargetMachine(r600_target, triple,
+ r600_get_llvm_processor_name(sscreen->b.family),
+ "+DumpCode,+vgpr-spilling",
+ LLVMCodeGenLevelDefault,
+ LLVMRelocDefault,
+ LLVMCodeModelDefault);
+#endif
+
return &sctx->b.b;
fail:
si_destroy_context(&sctx->b.b);
if (!sscreen->b.ws->unref(sscreen->b.ws))
return;
-#if HAVE_LLVM >= 0x0306
- // r600_destroy_common_screen() frees sscreen, so we need to make
- // sure to dispose the TargetMachine before we call it.
- LLVMDisposeTargetMachine(sscreen->tm);
-#endif
-
r600_destroy_common_screen(&sscreen->b);
}
struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws)
{
struct si_screen *sscreen = CALLOC_STRUCT(si_screen);
- LLVMTargetRef r600_target;
-#if HAVE_LLVM >= 0x0306
- const char *triple = "amdgcn--";
-#else
- const char *triple = "r600--";
-#endif
+
if (sscreen == NULL) {
return NULL;
}
/* Create the auxiliary context. This must be done last. */
sscreen->b.aux_context = sscreen->b.b.context_create(&sscreen->b.b, NULL);
-#if HAVE_LLVM >= 0x0306
- /* Initialize LLVM TargetMachine */
- r600_target = radeon_llvm_get_r600_target(triple);
- sscreen->tm = LLVMCreateTargetMachine(r600_target, triple,
- r600_get_llvm_processor_name(sscreen->b.family),
- "+DumpCode,+vgpr-spilling", LLVMCodeGenLevelDefault, LLVMRelocDefault,
- LLVMCodeModelDefault);
-#endif
return &sscreen->b.b;
}
struct si_screen {
struct r600_common_screen b;
- LLVMTargetMachineRef tm;
};
struct si_sampler_view {
struct pipe_resource *esgs_ring;
struct pipe_resource *gsvs_ring;
+ LLVMTargetMachineRef tm;
+
/* SI state handling */
union si_state queued;
union si_state emitted;
int param_streamout_offset[4];
int param_vertex_id;
int param_instance_id;
+ LLVMTargetMachineRef tm;
LLVMValueRef const_md;
LLVMValueRef const_resource[SI_NUM_CONST_BUFFERS];
LLVMValueRef ddxy_lds;
}
int si_compile_llvm(struct si_screen *sscreen, struct si_shader *shader,
- LLVMModuleRef mod)
+ LLVMTargetMachineRef tm, LLVMModuleRef mod)
{
int r = 0;
bool dump = r600_can_dump_shader(&sscreen->b,
shader->selector ? shader->selector->tokens : NULL);
r = radeon_llvm_compile(mod, &shader->binary,
- r600_get_llvm_processor_name(sscreen->b.family), dump, sscreen->tm);
+ r600_get_llvm_processor_name(sscreen->b.family), dump, tm);
if (r) {
return r;
fprintf(stderr, "Copy Vertex Shader for Geometry Shader:\n\n");
r = si_compile_llvm(sscreen, si_shader_ctx->shader,
- bld_base->base.gallivm->module);
+ si_shader_ctx->tm, bld_base->base.gallivm->module);
radeon_llvm_dispose(&si_shader_ctx->radeon_bld);
}
}
-int si_shader_create(struct si_screen *sscreen, struct si_shader *shader)
+int si_shader_create(struct si_screen *sscreen, LLVMTargetMachineRef tm,
+ struct si_shader *shader)
{
struct si_shader_selector *sel = shader->selector;
struct tgsi_token *tokens = sel->tokens;
si_shader_ctx.shader = shader;
si_shader_ctx.type = tgsi_get_processor_type(tokens);
si_shader_ctx.screen = sscreen;
+ si_shader_ctx.tm = tm;
switch (si_shader_ctx.type) {
case TGSI_PROCESSOR_VERTEX:
radeon_llvm_finalize_module(&si_shader_ctx.radeon_bld);
mod = bld_base->base.gallivm->module;
- r = si_compile_llvm(sscreen, shader, mod);
+ r = si_compile_llvm(sscreen, shader, tm, mod);
if (r) {
fprintf(stderr, "LLVM failed to compile shader\n");
goto out;
}
/* radeonsi_shader.c */
-int si_shader_create(struct si_screen *sscreen, struct si_shader *shader);
+int si_shader_create(struct si_screen *sscreen, LLVMTargetMachineRef tm,
+ struct si_shader *shader);
int si_compile_llvm(struct si_screen *sscreen, struct si_shader *shader,
- LLVMModuleRef mod);
+ LLVMTargetMachineRef tm, LLVMModuleRef mod);
void si_shader_destroy(struct pipe_context *ctx, struct si_shader *shader);
unsigned si_shader_io_get_unique_index(unsigned semantic_name, unsigned index);
int si_shader_binary_read(struct si_screen *sscreen, struct si_shader *shader,
static int si_shader_select(struct pipe_context *ctx,
struct si_shader_selector *sel)
{
+ struct si_context *sctx = (struct si_context *)ctx;
union si_shader_key key;
struct si_shader * shader = NULL;
int r;
shader->next_variant = sel->current;
sel->current = shader;
- r = si_shader_create((struct si_screen*)ctx->screen, shader);
+ r = si_shader_create((struct si_screen*)ctx->screen, sctx->tm,
+ shader);
if (unlikely(r)) {
R600_ERR("Failed to build shader variant (type=%u) %d\n",
sel->type, r);