lwr and swr instructions will load/store the data with opposite endianness.
Changelog
2014-02-10 Nagaraju Mekala <nagaraju.mekala@xilinx.com>
* gcc/config/microblaze/microblaze.md: Add movsi4_rev insn pattern.
* gcc/config/microblaze/predicates.md: Add reg_or_mem_operand predicate.
From-SVN: r207683
-2013-11-26 Nagaraju Mekala <nagaraju.mekala@xilinx.com>
+2014-02-10 Nagaraju Mekala <nagaraju.mekala@xilinx.com>
+
+ * config/microblaze/microblaze.md: Add movsi4_rev insn pattern.
+ * config/microblaze/predicates.md: Add reg_or_mem_operand predicate.
+
+2014-02-10 Nagaraju Mekala <nagaraju.mekala@xilinx.com>
* config/microblaze/microblaze.c: Extend mcpu version format
}
)
+;;Load and store reverse
+(define_insn "movsi4_rev"
+ [(set (match_operand:SI 0 "reg_or_mem_operand" "=r,Q")
+ (bswap:SI (match_operand:SF 1 "reg_or_mem_operand" "Q,r")))]
+ "TARGET_REORDER"
+ "@
+ lwr\t%0,%y1,r0
+ swr\t%1,%y0,r0"
+ [(set_attr "type" "load,store")
+ (set_attr "mode" "SI")
+ (set_attr "length" "4,4")])
+
;; 32-bit floating point moves
(define_expand "movsf"
(ior (match_operand 0 "const_0_operand")
(match_operand 0 "register_operand")))
+(define_predicate "reg_or_mem_operand"
+ (ior (match_operand 0 "memory_operand")
+ (match_operand 0 "register_operand")))
+
;; Return if the operand is either the PC or a label_ref.
(define_special_predicate "pc_or_label_operand"
(ior (match_code "pc,label_ref")