}
/* Read FW application security bits */
- if (hdev->asic_prop.fw_security_status_valid)
+ if (hdev->asic_prop.fw_security_status_valid) {
hdev->asic_prop.fw_app_security_map =
RREG32(cpu_security_boot_status_reg);
+ if (hdev->asic_prop.fw_app_security_map &
+ CPU_BOOT_DEV_STS0_FW_HARD_RST_EN)
+ hdev->asic_prop.hard_reset_done_by_fw = true;
+ }
+
+ dev_info(hdev->dev, "Firmware hard-reset is %s\n",
+ hdev->asic_prop.hard_reset_done_by_fw ? "enabled" : "disabled");
+
dev_info(hdev->dev, "Successfully loaded firmware to device\n");
out:
* device is indicated as security enabled,
* registers are protected, and device
* uses keys for image verification.
- * Initialized at: preboot
+ * Initialized in: preboot
*
* CPU_BOOT_DEV_STS0_DEBUG_EN Debug is enabled.
* Enabled when JTAG or DEBUG is enabled
* in FW.
- * Initialized at: preboot
+ * Initialized in: preboot
*
* CPU_BOOT_DEV_STS0_WATCHDOG_EN Watchdog is enabled.
* Watchdog is enabled in FW.
- * Initialized at: preboot
+ * Initialized in: preboot
*
* CPU_BOOT_DEV_STS0_DRAM_INIT_EN DRAM initialization is enabled.
* DRAM initialization has been done in FW.
- * Initialized at: u-boot
+ * Initialized in: u-boot
*
* CPU_BOOT_DEV_STS0_BMC_WAIT_EN Waiting for BMC data enabled.
* If set, it means that during boot,
* FW waited for BMC data.
- * Initialized at: u-boot
+ * Initialized in: u-boot
*
* CPU_BOOT_DEV_STS0_E2E_CRED_EN E2E credits initialized.
* FW initialized E2E credits.
- * Initialized at: u-boot
+ * Initialized in: u-boot
*
* CPU_BOOT_DEV_STS0_HBM_CRED_EN HBM credits initialized.
* FW initialized HBM credits.
- * Initialized at: u-boot
+ * Initialized in: u-boot
*
* CPU_BOOT_DEV_STS0_RL_EN Rate limiter initialized.
* FW initialized rate limiter.
- * Initialized at: u-boot
+ * Initialized in: u-boot
*
* CPU_BOOT_DEV_STS0_SRAM_SCR_EN SRAM scrambler enabled.
* FW initialized SRAM scrambler.
- * Initialized at: linux
+ * Initialized in: linux
*
* CPU_BOOT_DEV_STS0_DRAM_SCR_EN DRAM scrambler enabled.
* FW initialized DRAM scrambler.
- * Initialized at: u-boot
+ * Initialized in: u-boot
+ *
+ * CPU_BOOT_DEV_STS0_FW_HARD_RST_EN FW hard reset procedure is enabled.
+ * FW has the hard reset procedure
+ * implemented. This means that FW will
+ * perform hard reset procedure on
+ * receiving the halt-machine event.
+ * Initialized in: linux
*
* CPU_BOOT_DEV_STS0_ENABLED Device status register enabled.
* This is a main indication that the
* register. Meaning the device status
* bits are not garbage, but actual
* statuses.
- * Initialized at: preboot
+ * Initialized in: preboot
*/
#define CPU_BOOT_DEV_STS0_SECURITY_EN (1 << 0)
#define CPU_BOOT_DEV_STS0_DEBUG_EN (1 << 1)
#define CPU_BOOT_DEV_STS0_RL_EN (1 << 7)
#define CPU_BOOT_DEV_STS0_SRAM_SCR_EN (1 << 8)
#define CPU_BOOT_DEV_STS0_DRAM_SCR_EN (1 << 9)
+#define CPU_BOOT_DEV_STS0_FW_HARD_RST_EN (1 << 10)
#define CPU_BOOT_DEV_STS0_ENABLED (1 << 31)
enum cpu_boot_status {