radeonsi: call nir_lower_bool_to_int32 last because it breaks nir_opt_if
authorMarek Olšák <marek.olsak@amd.com>
Tue, 29 Sep 2020 21:32:21 +0000 (17:32 -0400)
committerMarge Bot <eric+marge@anholt.net>
Thu, 1 Oct 2020 16:29:46 +0000 (16:29 +0000)
The new place is where shader variants are generated.

This is a prerequisite for inlinable uniforms.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6948>

src/gallium/drivers/radeonsi/si_shader.c
src/gallium/drivers/radeonsi/si_shader_nir.c

index 888a731..e83abc9 100644 (file)
@@ -1604,10 +1604,11 @@ static bool si_should_optimize_less(struct ac_llvm_compiler *compiler,
 
 static struct nir_shader *get_nir_shader(struct si_shader_selector *sel, bool *free_nir)
 {
+   nir_shader *nir;
    *free_nir = false;
 
    if (sel->nir) {
-      return sel->nir;
+      nir = sel->nir;
    } else if (sel->nir_binary) {
       struct pipe_screen *screen = &sel->screen->b;
       const void *options = screen->get_compiler_options(screen, PIPE_SHADER_IR_NIR,
@@ -1616,9 +1617,14 @@ static struct nir_shader *get_nir_shader(struct si_shader_selector *sel, bool *f
       struct blob_reader blob_reader;
       blob_reader_init(&blob_reader, sel->nir_binary, sel->nir_size);
       *free_nir = true;
-      return nir_deserialize(NULL, options, &blob_reader);
+      nir = nir_deserialize(NULL, options, &blob_reader);
+   } else {
+      return NULL;
    }
-   return NULL;
+
+   NIR_PASS_V(nir, nir_lower_bool_to_int32);
+
+   return nir;
 }
 
 static bool si_llvm_compile_shader(struct si_screen *sscreen, struct ac_llvm_compiler *compiler,
index 0794e54..f463e87 100644 (file)
@@ -706,7 +706,6 @@ static void si_lower_nir(struct si_screen *sscreen, struct nir_shader *nir)
       NIR_PASS_V(nir, nir_opt_cse);
    }
 
-   NIR_PASS_V(nir, nir_lower_bool_to_int32);
    NIR_PASS_V(nir, nir_remove_dead_variables, nir_var_function_temp, NULL);
 
    if (sscreen->debug_flags & DBG(FS_CORRECT_DERIVS_AFTER_KILL))