[SystemZ] New CL option to enable subreg liveness

This option is needed to enable subreg liveness tracking during register
allocation.

Review: Ulrich Weigand
https://reviews.llvm.org/D50779

llvm-svn: 339776

diff --git a/llvm/lib/Target/SystemZ/SystemZSubtarget.cpp b/llvm/lib/Target/SystemZ/SystemZSubtarget.cpp
index 9cd09b0f911e0e69252feb13539c6c0df4842e50..fb030a207bc755db4eab5a3b45cb65859dfa3388 100644 (file)
--- a/llvm/lib/Target/SystemZ/SystemZSubtarget.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZSubtarget.cpp
@@ -19,6 +19,11 @@ using namespace llvm;
 #define GET_SUBTARGETINFO_CTOR
 #include "SystemZGenSubtargetInfo.inc"
 
+static cl::opt<bool> UseSubRegLiveness(
+    "systemz-subreg-liveness",
+    cl::desc("Enable subregister liveness tracking for SystemZ (experimental)"),
+    cl::Hidden);
+
 // Pin the vtable to this file.
 void SystemZSubtarget::anchor() {}
 
@@ -54,6 +59,11 @@ SystemZSubtarget::SystemZSubtarget(const Triple &TT, const std::string &CPU,
       TargetTriple(TT), InstrInfo(initializeSubtargetDependencies(CPU, FS)),
       TLInfo(TM, *this), TSInfo(), FrameLowering() {}
 
+
+bool SystemZSubtarget::enableSubRegLiveness() const {
+  return UseSubRegLiveness;
+}
+
 bool SystemZSubtarget::isPC32DBLSymbol(const GlobalValue *GV,
                                        CodeModel::Model CM) const {
   // PC32DBL accesses require the low bit to be clear.  Note that a zero

diff --git a/llvm/lib/Target/SystemZ/SystemZSubtarget.h b/llvm/lib/Target/SystemZ/SystemZSubtarget.h
index 8285b4277d11daff0efeba0fe4c7a4d6140129e7..cb6b21a1d465cbfaf439c70b320825d0ac15271c 100644 (file)
--- a/llvm/lib/Target/SystemZ/SystemZSubtarget.h
+++ b/llvm/lib/Target/SystemZ/SystemZSubtarget.h
@@ -102,6 +102,9 @@ public:
   // Always enable the early if-conversion pass.
   bool enableEarlyIfConversion() const override { return true; }
 
+  // Enable tracking of subregister liveness in register allocator.
+  bool enableSubRegLiveness() const override;
+
   // Automatically generated by tblgen.
   void ParseSubtargetFeatures(StringRef CPU, StringRef FS);