ASoC: cs42l42: Correct some register default values
authorRichard Fitzgerald <rf@opensource.cirrus.com>
Fri, 15 Oct 2021 13:36:06 +0000 (14:36 +0100)
committerMark Brown <broonie@kernel.org>
Fri, 15 Oct 2021 15:14:13 +0000 (16:14 +0100)
Some registers had wrong default values in cs42l42_reg_defaults[].

Signed-off-by: Richard Fitzgerald <rf@opensource.cirrus.com>
Fixes: 2c394ca79604 ("ASoC: Add support for CS42L42 codec")
Link: https://lore.kernel.org/r/20211015133619.4698-4-rf@opensource.cirrus.com
Signed-off-by: Mark Brown <broonie@kernel.org>
sound/soc/codecs/cs42l42.c

index 9142571..a450268 100644 (file)
@@ -93,7 +93,7 @@ static const struct reg_default cs42l42_reg_defaults[] = {
        { CS42L42_ASP_RX_INT_MASK,              0x1F },
        { CS42L42_ASP_TX_INT_MASK,              0x0F },
        { CS42L42_CODEC_INT_MASK,               0x03 },
-       { CS42L42_SRCPL_INT_MASK,               0xFF },
+       { CS42L42_SRCPL_INT_MASK,               0x7F },
        { CS42L42_VPMON_INT_MASK,               0x01 },
        { CS42L42_PLL_LOCK_INT_MASK,            0x01 },
        { CS42L42_TSRS_PLUG_INT_MASK,           0x0F },
@@ -130,7 +130,7 @@ static const struct reg_default cs42l42_reg_defaults[] = {
        { CS42L42_MIXER_CHA_VOL,                0x3F },
        { CS42L42_MIXER_ADC_VOL,                0x3F },
        { CS42L42_MIXER_CHB_VOL,                0x3F },
-       { CS42L42_EQ_COEF_IN0,                  0x22 },
+       { CS42L42_EQ_COEF_IN0,                  0x00 },
        { CS42L42_EQ_COEF_IN1,                  0x00 },
        { CS42L42_EQ_COEF_IN2,                  0x00 },
        { CS42L42_EQ_COEF_IN3,                  0x00 },