The extcsd read target must be cache aligned in case the controller
uses DMA to read the extcsd register, make it so.
Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
#include <blk.h>
#include <command.h>
#include <console.h>
+#include <memalign.h>
#include <mmc.h>
#include <part.h>
#include <sparse_format.h>
if (!IS_SD(mmc) && mmc->version >= MMC_VERSION_4_41) {
bool has_enh = (mmc->part_support & ENHNCD_SUPPORT) != 0;
bool usr_enh = has_enh && (mmc->part_attr & EXT_CSD_ENH_USR);
- u8 wp, ext_csd[MMC_MAX_BLOCK_LEN];
+ ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
+ u8 wp;
int ret;
#if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING)