staging: clocking-wizard: match parenthesis indentation
authorIoannis Valasakis <code@wizofe.uk>
Thu, 4 Oct 2018 12:41:01 +0000 (13:41 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 9 Oct 2018 12:57:33 +0000 (14:57 +0200)
Match parenthesis indentation after line end, and fixed alignment
to conform to the coding style guidelines.
Reported by checkpatch.

Signed-off-by: Ioannis Valasakis <code@wizofe.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c

index cae7e6e..15b7a82 100644 (file)
@@ -199,10 +199,10 @@ static int clk_wzrd_probe(struct platform_device *pdev)
                ret = -ENOMEM;
                goto err_disable_clk;
        }
-       clk_wzrd->clks_internal[wzrd_clk_mul] = clk_register_fixed_factor(
-                       &pdev->dev, clk_name,
-                       __clk_get_name(clk_wzrd->clk_in1),
-                       0, reg, 1);
+       clk_wzrd->clks_internal[wzrd_clk_mul] = clk_register_fixed_factor
+                       (&pdev->dev, clk_name,
+                        __clk_get_name(clk_wzrd->clk_in1),
+                        0, reg, 1);
        kfree(clk_name);
        if (IS_ERR(clk_wzrd->clks_internal[wzrd_clk_mul])) {
                dev_err(&pdev->dev, "unable to register fixed-factor clock\n");
@@ -219,10 +219,10 @@ static int clk_wzrd_probe(struct platform_device *pdev)
                goto err_rm_int_clk;
        }
 
-       clk_wzrd->clks_internal[wzrd_clk_mul_div] = clk_register_fixed_factor(
-                       &pdev->dev, clk_name,
-                       __clk_get_name(clk_wzrd->clks_internal[wzrd_clk_mul]),
-                       0, 1, reg);
+       clk_wzrd->clks_internal[wzrd_clk_mul_div] = clk_register_fixed_factor
+                       (&pdev->dev, clk_name,
+                        __clk_get_name(clk_wzrd->clks_internal[wzrd_clk_mul]),
+                        0, 1, reg);
        if (IS_ERR(clk_wzrd->clks_internal[wzrd_clk_mul_div])) {
                dev_err(&pdev->dev, "unable to register divider clock\n");
                ret = PTR_ERR(clk_wzrd->clks_internal[wzrd_clk_mul_div]);
@@ -243,8 +243,8 @@ static int clk_wzrd_probe(struct platform_device *pdev)
                reg = readl(clk_wzrd->base + WZRD_CLK_CFG_REG(2) + i * 12);
                reg &= WZRD_CLKOUT_DIVIDE_MASK;
                reg >>= WZRD_CLKOUT_DIVIDE_SHIFT;
-               clk_wzrd->clkout[i] = clk_register_fixed_factor(&pdev->dev,
-                               clkout_name, clk_name, 0, 1, reg);
+               clk_wzrd->clkout[i] = clk_register_fixed_factor
+                       (&pdev->dev, clkout_name, clk_name, 0, 1, reg);
                if (IS_ERR(clk_wzrd->clkout[i])) {
                        int j;