[X86][Costmodel] Load/store i32/f32 Stride=6 VF=4 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/szEj1ceee - for intels `Block RThroughput: =15.0`; for ryzens, `Block RThroughput: <=8.8`
So could pick cost of `15`.

For store we have:
https://godbolt.org/z/81bq4fTo1 - for intels `Block RThroughput: =12.0`; for ryzens, `Block RThroughput: <=10.0`
So we could pick cost of `12`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111087

diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
index 6692ab1..3c11911 100644 (file)
--- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -5149,6 +5149,7 @@ InstructionCost X86TTIImpl::getInterleavedMemoryOpCostAVX2(
       {6, MVT::v16i16, 106}, // (load 96i16 and) deinterleave into 6 x 16i16
 
       {6, MVT::v2i32, 6}, // (load 12i32 and) deinterleave into 6 x 2i32
+      {6, MVT::v4i32, 15}, // (load 24i32 and) deinterleave into 6 x 4i32
 
       {8, MVT::v8i32, 40} // (load 64i32 and) deinterleave into 8 x 8i32
   };
@@ -5232,6 +5233,7 @@ InstructionCost X86TTIImpl::getInterleavedMemoryOpCostAVX2(
       {6, MVT::v16i16, 58},  // interleave 6 x 16i16 into 96i16 (and store)
 
       {6, MVT::v2i32, 9},  // interleave 6 x 2i32 into 12i32 (and store)
+      {6, MVT::v4i32, 12},  // interleave 6 x 4i32 into 24i32 (and store)
   };
 
   if (Opcode == Instruction::Load) {

diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-6.ll b/llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-6.ll
index 964a48a..021a9f0 100644 (file)
--- a/llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-6.ll
+++ b/llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-6.ll
@@ -25,7 +25,7 @@ target triple = "x86_64-unknown-linux-gnu"
 ;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 8 for VF 2 For instruction:   %v0 = load float, float* %in0, align 4
-; AVX2: LV: Found an estimated cost of 51 for VF 4 For instruction:   %v0 = load float, float* %in0, align 4
+; AVX2: LV: Found an estimated cost of 18 for VF 4 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 114 for VF 8 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 228 for VF 16 For instruction:   %v0 = load float, float* %in0, align 4
 ;

diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-6.ll b/llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-6.ll
index ad3eade..89f54c3 100644 (file)
--- a/llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-6.ll
+++ b/llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-6.ll
@@ -25,7 +25,7 @@ target triple = "x86_64-unknown-linux-gnu"
 ;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 8 for VF 2 For instruction:   %v0 = load i32, i32* %in0, align 4
-; AVX2: LV: Found an estimated cost of 63 for VF 4 For instruction:   %v0 = load i32, i32* %in0, align 4
+; AVX2: LV: Found an estimated cost of 18 for VF 4 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 138 for VF 8 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 276 for VF 16 For instruction:   %v0 = load i32, i32* %in0, align 4
 ;

diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-6.ll b/llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-6.ll
index 89c7b4d..d9470e0 100644 (file)
--- a/llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-6.ll
+++ b/llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-6.ll
@@ -25,7 +25,7 @@ target triple = "x86_64-unknown-linux-gnu"
 ;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   store float %v5, float* %out5, align 4
 ; AVX2: LV: Found an estimated cost of 11 for VF 2 For instruction:   store float %v5, float* %out5, align 4
-; AVX2: LV: Found an estimated cost of 45 for VF 4 For instruction:   store float %v5, float* %out5, align 4
+; AVX2: LV: Found an estimated cost of 15 for VF 4 For instruction:   store float %v5, float* %out5, align 4
 ; AVX2: LV: Found an estimated cost of 114 for VF 8 For instruction:   store float %v5, float* %out5, align 4
 ; AVX2: LV: Found an estimated cost of 228 for VF 16 For instruction:   store float %v5, float* %out5, align 4
 ;

diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-6.ll b/llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-6.ll
index a2d7fed..f35c795 100644 (file)
--- a/llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-6.ll
+++ b/llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-6.ll
@@ -25,7 +25,7 @@ target triple = "x86_64-unknown-linux-gnu"
 ;
 ; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction:   store i32 %v5, i32* %out5, align 4
 ; AVX2: LV: Found an estimated cost of 11 for VF 2 For instruction:   store i32 %v5, i32* %out5, align 4
-; AVX2: LV: Found an estimated cost of 57 for VF 4 For instruction:   store i32 %v5, i32* %out5, align 4
+; AVX2: LV: Found an estimated cost of 15 for VF 4 For instruction:   store i32 %v5, i32* %out5, align 4
 ; AVX2: LV: Found an estimated cost of 138 for VF 8 For instruction:   store i32 %v5, i32* %out5, align 4
 ; AVX2: LV: Found an estimated cost of 276 for VF 16 For instruction:   store i32 %v5, i32* %out5, align 4
 ;