arm: dts: Remove p1010-flexcan compatible from imx series dts
authorPankaj Bansal <pankaj.bansal@nxp.com>
Fri, 24 Nov 2017 13:22:12 +0000 (18:52 +0530)
committerMarc Kleine-Budde <mkl@pengutronix.de>
Fri, 1 Dec 2017 08:14:23 +0000 (09:14 +0100)
The flexcan driver has been modified to check for big-endian dts
property for be read/write to flexcan registers/mb.

An exception to this rule is powerpc P1010RDB, which is always
big-endian, even if big-endian is not present in dts. This is
checked using p1010-flexcan compatible in dts.

Therefore, remove p1010-flexcan compatible from imx series dts,
as their flexcan core is little endian.

Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
arch/arm/boot/dts/imx25.dtsi
arch/arm/boot/dts/imx28.dtsi
arch/arm/boot/dts/imx35.dtsi
arch/arm/boot/dts/imx53.dtsi

index 09ce8b8..fcaff1c 100644 (file)
                        };
 
                        can1: can@43f88000 {
-                               compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
+                               compatible = "fsl,imx25-flexcan";
                                reg = <0x43f88000 0x4000>;
                                interrupts = <43>;
                                clocks = <&clks 75>, <&clks 75>;
                        };
 
                        can2: can@43f8c000 {
-                               compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
+                               compatible = "fsl,imx25-flexcan";
                                reg = <0x43f8c000 0x4000>;
                                interrupts = <44>;
                                clocks = <&clks 76>, <&clks 76>;
index 2f4ebe0..e52e05c 100644 (file)
                        };
 
                        can0: can@80032000 {
-                               compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
+                               compatible = "fsl,imx28-flexcan";
                                reg = <0x80032000 0x2000>;
                                interrupts = <8>;
                                clocks = <&clks 58>, <&clks 58>;
                        };
 
                        can1: can@80034000 {
-                               compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
+                               compatible = "fsl,imx28-flexcan";
                                reg = <0x80034000 0x2000>;
                                interrupts = <9>;
                                clocks = <&clks 59>, <&clks 59>;
index 6d5e6a6..1f0e220 100644 (file)
                        };
 
                        can1: can@53fe4000 {
-                               compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";
+                               compatible = "fsl,imx35-flexcan";
                                reg = <0x53fe4000 0x1000>;
                                clocks = <&clks 33>, <&clks 33>;
                                clock-names = "ipg", "per";
                        };
 
                        can2: can@53fe8000 {
-                               compatible = "fsl,imx35-flexcan", "fsl,p1010-flexcan";
+                               compatible = "fsl,imx35-flexcan";
                                reg = <0x53fe8000 0x1000>;
                                clocks = <&clks 34>, <&clks 34>;
                                clock-names = "ipg", "per";
index 589a67c..a5a0507 100644 (file)
                        };
 
                        can1: can@53fc8000 {
-                               compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan";
+                               compatible = "fsl,imx53-flexcan";
                                reg = <0x53fc8000 0x4000>;
                                interrupts = <82>;
                                clocks = <&clks IMX5_CLK_CAN1_IPG_GATE>,
                        };
 
                        can2: can@53fcc000 {
-                               compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan";
+                               compatible = "fsl,imx53-flexcan";
                                reg = <0x53fcc000 0x4000>;
                                interrupts = <83>;
                                clocks = <&clks IMX5_CLK_CAN2_IPG_GATE>,