arm64: dts: imx8m: drop interrupt-affinity for pmu
authorPeng Fan <peng.fan@nxp.com>
Sat, 7 Aug 2021 09:45:37 +0000 (17:45 +0800)
committerShawn Guo <shawnguo@kernel.org>
Sat, 14 Aug 2021 04:39:27 +0000 (12:39 +0800)
i.MX8M use PPI for pmu, interrupt-affinity is not needed.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx8mm.dtsi
arch/arm64/boot/dts/freescale/imx8mn.dtsi
arch/arm64/boot/dts/freescale/imx8mp.dtsi
arch/arm64/boot/dts/freescale/imx8mq.dtsi

index 485175c..e956dcf 100644 (file)
                compatible = "arm,cortex-a53-pmu";
                interrupts = <GIC_PPI 7
                             (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
-               interrupt-affinity = <&A53_0>, <&A53_1>, <&A53_2>, <&A53_3>;
        };
 
        timer {
index 43763d9..2d154a3 100644 (file)
                compatible = "arm,cortex-a53-pmu";
                interrupts = <GIC_PPI 7
                             (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
-               interrupt-affinity = <&A53_0>, <&A53_1>, <&A53_2>, <&A53_3>;
        };
 
        psci {
index 2a1a4ff..3096acf 100644 (file)
                compatible = "arm,cortex-a53-pmu";
                interrupts = <GIC_PPI 7
                             (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
-               interrupt-affinity = <&A53_0>, <&A53_1>, <&A53_2>, <&A53_3>;
        };
 
        psci {
index e026a39..4066b16 100644 (file)
                compatible = "arm,cortex-a53-pmu";
                interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
                interrupt-parent = <&gic>;
-               interrupt-affinity = <&A53_0>, <&A53_1>, <&A53_2>, <&A53_3>;
        };
 
        psci {