powerpc: Fix fesetexceptflag [BZ#17885]

This patch fixes a bug introduced by 18f2945ae9216cfc, where it optimizes
the FPSCR set by just issuing a mtfs instruction if new flag is different
from older one.  The issue is a typo, where the new flag should the the
new value, instead of the old one.

It fixes BZ#17885.

diff --git a/ChangeLog b/ChangeLog
index 2e31200..52f8c11 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,9 @@
 2015-01-28  Adhemerval Zanellla  <azanella@linux.vnet.ibm.com>
 
+       [BZ #17885]
+       * sysdeps/powerpc/fpu/fsetexcptflg.c (__fesetexceptflag): Fix correct
+       value to set as new flag.
+
        [BZ #16576]
        * sysdeps/powerpc/fpu/math_private.h [__CPU_HAS_FSQRT]: Remove define
        and use _ARCH_PPCSQ instead.

diff --git a/NEWS b/NEWS
index 2e25c5c..1dcfc7d 100644 (file)
--- a/NEWS
+++ b/NEWS
@@ -18,7 +18,7 @@ Version 2.21
   17657, 17658, 17664, 17665, 17668, 17682, 17702, 17717, 17719, 17722,
   17723, 17724, 17725, 17732, 17733, 17744, 17745, 17746, 17747, 17748,
   17775, 17777, 17780, 17781, 17782, 17791, 17793, 17796, 17797, 17803,
-  17806, 17834, 17844, 17848, 17868, 17869, 17870
+  17806, 17834, 17844, 17848, 17868, 17869, 17870, 17885
 
 * A new semaphore algorithm has been implemented in generic C code for all
   machines. Previous custom assembly implementations of semaphore were

diff --git a/sysdeps/powerpc/fpu/fsetexcptflg.c b/sysdeps/powerpc/fpu/fsetexcptflg.c
index 5d99bf2..836d839 100644 (file)
--- a/sysdeps/powerpc/fpu/fsetexcptflg.c
+++ b/sysdeps/powerpc/fpu/fsetexcptflg.c
@@ -40,7 +40,7 @@ __fesetexceptflag (const fexcept_t *flagp, int excepts)
      This may cause floating-point exceptions if the restored state
      requests it.  */
   if (n.l != u.l)
-    fesetenv_register (u.fenv);
+    fesetenv_register (n.fenv);
 
   /* Deal with FE_INVALID_SOFTWARE not being implemented on some chips.  */
   if (flag & FE_INVALID)