drm/i915/display/adl_p: Correctly program MBUS DBOX A credits
authorJosé Roberto de Souza <jose.souza@intel.com>
Thu, 8 Jul 2021 21:18:26 +0000 (14:18 -0700)
committerJosé Roberto de Souza <jose.souza@intel.com>
Tue, 3 Aug 2021 23:10:55 +0000 (16:10 -0700)
Alderlake-P have different values for MBUS DBOX A credits depending
if MBUS join is enabled or not.

BSpec: 50343
BSpec: 54369
Cc: Matt Atwood <matthew.s.atwood@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210708211827.288601-6-jose.souza@intel.com
drivers/gpu/drm/i915/display/intel_display.c

index 1d8d610180e7448fc2fb9d1b5700e24a3df46d2f..122f091e0a1e1e2b855656f653fc0f79197b2c5f 100644 (file)
@@ -3442,13 +3442,17 @@ static void glk_pipe_scaler_clock_gating_wa(struct drm_i915_private *dev_priv,
        intel_de_write(dev_priv, CLKGATE_DIS_PSL(pipe), val);
 }
 
-static void icl_pipe_mbus_enable(struct intel_crtc *crtc)
+static void icl_pipe_mbus_enable(struct intel_crtc *crtc, bool joined_mbus)
 {
        struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
        enum pipe pipe = crtc->pipe;
        u32 val;
 
-       val = MBUS_DBOX_A_CREDIT(2);
+       /* Wa_22010947358:adl-p */
+       if (IS_ALDERLAKE_P(dev_priv))
+               val = joined_mbus ? MBUS_DBOX_A_CREDIT(6) : MBUS_DBOX_A_CREDIT(4);
+       else
+               val = MBUS_DBOX_A_CREDIT(2);
 
        if (DISPLAY_VER(dev_priv) >= 12) {
                val |= MBUS_DBOX_BW_CREDIT(2);
@@ -3604,8 +3608,12 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
        if (dev_priv->display.initial_watermarks)
                dev_priv->display.initial_watermarks(state, crtc);
 
-       if (DISPLAY_VER(dev_priv) >= 11)
-               icl_pipe_mbus_enable(crtc);
+       if (DISPLAY_VER(dev_priv) >= 11) {
+               const struct intel_dbuf_state *dbuf_state =
+                               intel_atomic_get_new_dbuf_state(state);
+
+               icl_pipe_mbus_enable(crtc, dbuf_state->joined_mbus);
+       }
 
        if (new_crtc_state->bigjoiner_slave)
                intel_crtc_vblank_on(new_crtc_state);