arm64: insn: Add barrier encodings

Create necessary functions to encode/decode aarch64 barrier
instructions.

DSB needs special case handling as it has multiple encodings.

Signed-off-by: Julien Thierry <jthierry@redhat.com>
Link: https://lore.kernel.org/r/20210303170536.1838032-7-jthierry@redhat.com
[will: Don't reject DSB #4]
Signed-off-by: Will Deacon <will@kernel.org>

diff --git a/arch/arm64/include/asm/insn.h b/arch/arm64/include/asm/insn.h
index 93f7b0c..b8e2c6c 100644 (file)
--- a/arch/arm64/include/asm/insn.h
+++ b/arch/arm64/include/asm/insn.h
@@ -370,6 +370,14 @@ __AARCH64_INSN_FUNCS(eret_auth,    0xFFFFFBFF, 0xD69F0BFF)
 __AARCH64_INSN_FUNCS(mrs,      0xFFF00000, 0xD5300000)
 __AARCH64_INSN_FUNCS(msr_imm,  0xFFF8F01F, 0xD500401F)
 __AARCH64_INSN_FUNCS(msr_reg,  0xFFF00000, 0xD5100000)
+__AARCH64_INSN_FUNCS(dmb,      0xFFFFF0FF, 0xD50330BF)
+__AARCH64_INSN_FUNCS(dsb_base, 0xFFFFF0FF, 0xD503309F)
+__AARCH64_INSN_FUNCS(dsb_nxs,  0xFFFFF3FF, 0xD503323F)
+__AARCH64_INSN_FUNCS(isb,      0xFFFFF0FF, 0xD50330DF)
+__AARCH64_INSN_FUNCS(sb,       0xFFFFFFFF, 0xD50330FF)
+__AARCH64_INSN_FUNCS(clrex,    0xFFFFF0FF, 0xD503305F)
+__AARCH64_INSN_FUNCS(ssbb,     0xFFFFFFFF, 0xD503309F)
+__AARCH64_INSN_FUNCS(pssbb,    0xFFFFFFFF, 0xD503349F)
 
 #undef __AARCH64_INSN_FUNCS
 
@@ -381,6 +389,19 @@ static inline bool aarch64_insn_is_adr_adrp(u32 insn)
        return aarch64_insn_is_adr(insn) || aarch64_insn_is_adrp(insn);
 }
 
+static inline bool aarch64_insn_is_dsb(u32 insn)
+{
+       return aarch64_insn_is_dsb_base(insn) || aarch64_insn_is_dsb_nxs(insn);
+}
+
+static inline bool aarch64_insn_is_barrier(u32 insn)
+{
+       return aarch64_insn_is_dmb(insn) || aarch64_insn_is_dsb(insn) ||
+              aarch64_insn_is_isb(insn) || aarch64_insn_is_sb(insn) ||
+              aarch64_insn_is_clrex(insn) || aarch64_insn_is_ssbb(insn) ||
+              aarch64_insn_is_pssbb(insn);
+}
+
 enum aarch64_insn_encoding_class aarch64_get_insn_class(u32 insn);
 bool aarch64_insn_uses_literal(u32 insn);
 bool aarch64_insn_is_branch(u32 insn);