[SelectionDAG] Don't pass on DemandedElts when handling SCALAR_TO_VECTOR
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Fri, 7 Dec 2018 09:18:44 +0000 (09:18 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Fri, 7 Dec 2018 09:18:44 +0000 (09:18 +0000)
Fixes an assertion:

llc: lib/CodeGen/SelectionDAG/SelectionDAG.cpp:2200: llvm::KnownBits llvm::SelectionDAG::computeKnownBits(llvm::SDValue, const llvm::APInt&, unsigned int) const: Assertion `(!Op.getValueType().isVector() || NumElts == Op.getValueType().getVectorNumElements()) && "Unexpected vector size"' failed.

Committed on behalf of: @pendingchaos (Rhys Perry)

Differential Revision: https://reviews.llvm.org/D55223

llvm-svn: 348574

llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
llvm/test/CodeGen/AMDGPU/computeKnownBits-scalar-to-vector-crash.ll [new file with mode: 0644]

index ddc9dc8..7e9c5de 100644 (file)
@@ -2352,7 +2352,7 @@ KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
       break;
 
     SDValue N0 = Op.getOperand(0);
-    Known = computeKnownBits(N0, DemandedElts, Depth + 1);
+    Known = computeKnownBits(N0, Depth + 1);
     if (N0.getValueSizeInBits() != BitWidth)
       Known = Known.trunc(BitWidth);
 
diff --git a/llvm/test/CodeGen/AMDGPU/computeKnownBits-scalar-to-vector-crash.ll b/llvm/test/CodeGen/AMDGPU/computeKnownBits-scalar-to-vector-crash.ll
new file mode 100644 (file)
index 0000000..06049b7
--- /dev/null
@@ -0,0 +1,11 @@
+; RUN: llc -march=amdgcn -mcpu=gfx802 -verify-machineinstrs < %s | FileCheck %s
+
+; CHECK: s_waitcnt
+define <2 x i16> @main(<2 x float>) #0 {
+  %2 = bitcast <2 x float> %0 to <4 x i16>
+  %3 = shufflevector <4 x i16> %2, <4 x i16> undef, <2 x i32> <i32 0, i32 undef>
+  %4 = extractelement <4 x i16> %2, i32 0
+  %5 = insertelement <2 x i16> %3, i16 %4, i32 0
+  ret <2 x i16> %5
+}
+