ARM: shmobile: r8a7740: add MERAM work-around
authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tue, 12 Jun 2012 09:36:21 +0000 (02:36 -0700)
committerRafael J. Wysocki <rjw@sisk.pl>
Wed, 20 Jun 2012 10:27:48 +0000 (12:27 +0200)
r8a7740 chip has lasting errata on MERAM buffer, and this patch adds
its work-around on setup-r8a7740.c
It solved CEU/VIO6C/2D-DMAC/VCP1/VPU5F/JPU/DISP memroy access error.

But MERAM driver can't control this issue,
since this work-around requires access to non-MERAM register address.
So, This it will be called as board specific code at this point.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Simon Horman <horms@verge.net.au>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
arch/arm/mach-shmobile/board-armadillo800eva.c
arch/arm/mach-shmobile/include/mach/common.h
arch/arm/mach-shmobile/setup-r8a7740.c

index 9e37026..6e6839d 100644 (file)
@@ -587,6 +587,7 @@ static void __init eva_init(void)
        eva_clock_init();
 
        r8a7740_pinmux_init();
+       r8a7740_meram_workaround();
 
        /* SCIFA1 */
        gpio_request(GPIO_FN_SCIFA1_RXD, NULL);
index 01e2bc0..45e61da 100644 (file)
@@ -77,6 +77,7 @@ extern void r8a7779_add_standard_devices(void);
 extern void r8a7779_clock_init(void);
 extern void r8a7779_pinmux_init(void);
 extern void r8a7779_pm_init(void);
+extern void r8a7740_meram_workaround(void);
 
 extern unsigned int r8a7779_get_core_count(void);
 extern int r8a7779_platform_cpu_kill(unsigned int cpu);
index ec4eb49..366311b 100644 (file)
@@ -324,6 +324,24 @@ static struct platform_device *r8a7740_late_devices[] __initdata = {
        &i2c1_device,
 };
 
+/*
+ * r8a7740 chip has lasting errata on MERAM buffer.
+ * this is work-around for it.
+ * see
+ *     "Media RAM (MERAM)" on r8a7740 documentation
+ */
+#define MEBUFCNTR      0xFE950098
+void r8a7740_meram_workaround(void)
+{
+       void __iomem *reg;
+
+       reg = ioremap_nocache(MEBUFCNTR, 4);
+       if (reg) {
+               iowrite32(0x01600164, reg);
+               iounmap(reg);
+       }
+}
+
 #define ICCR   0x0004
 #define ICSTART        0x0070