PCI: rcar: Add gen2 device tree support
authorBen Dooks <ben.dooks@codethink.co.uk>
Mon, 19 May 2014 21:10:20 +0000 (01:10 +0400)
committerBjorn Helgaas <bhelgaas@google.com>
Wed, 28 May 2014 13:47:55 +0000 (07:47 -0600)
Add device tree probing support to the 'pci-rcar-gen2' driver.

[Sergei: numerous fixes/cleanups/additions]
[bhelgaas: whitespace fix]
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt [new file with mode: 0644]
drivers/pci/host/pci-rcar-gen2.c

diff --git a/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt b/Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt
new file mode 100644 (file)
index 0000000..d8ef5bf
--- /dev/null
@@ -0,0 +1,66 @@
+Renesas AHB to PCI bridge
+-------------------------
+
+This is the bridge used internally to connect the USB controllers to the
+AHB. There is one bridge instance per USB port connected to the internal
+OHCI and EHCI controllers.
+
+Required properties:
+- compatible: "renesas,pci-r8a7790" for the R8A7790 SoC;
+             "renesas,pci-r8a7791" for the R8A7791 SoC.
+- reg: A list of physical regions to access the device: the first is
+       the operational registers for the OHCI/EHCI controllers and the
+       second is for the bridge configuration and control registers.
+- interrupts: interrupt for the device.
+- clocks: The reference to the device clock.
+- bus-range: The PCI bus number range; as this is a single bus, the range
+            should be specified as the same value twice.
+- #address-cells: must be 3.
+- #size-cells: must be 2.
+- #interrupt-cells: must be 1.
+- interrupt-map: standard property used to define the mapping of the PCI
+  interrupts to the GIC interrupts.
+- interrupt-map-mask: standard property that helps to define the interrupt
+  mapping.
+
+Example SoC configuration:
+
+       pci0: pci@ee090000  {
+               compatible = "renesas,pci-r8a7790";
+               clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
+               reg = <0x0 0xee090000 0x0 0xc00>,
+                     <0x0 0xee080000 0x0 0x1100>;
+               interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
+               status = "disabled";
+
+               bus-range = <0 0>;
+               #address-cells = <3>;
+               #size-cells = <2>;
+               #interrupt-cells = <1>;
+               interrupt-map-mask = <0xff00 0 0 0x7>;
+               interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
+                                0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
+                                0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>;
+
+               pci@0,1 {
+                       reg = <0x800 0 0 0 0>;
+                       device_type = "pci";
+                       phys = <&usbphy 0 0>;
+                       phy-names = "usb";
+               };
+
+               pci@0,2 {
+                       reg = <0x1000 0 0 0 0>;
+                       device_type = "pci";
+                       phys = <&usbphy 0 0>;
+                       phy-names = "usb";
+               };
+       };
+
+Example board setup:
+
+&pci0 {
+       status = "okay";
+       pinctrl-0 = <&usb0_pins>;
+       pinctrl-names = "default";
+};
index 4fe349d..3ef854f 100644 (file)
@@ -99,6 +99,7 @@ struct rcar_pci_priv {
        struct resource io_res;
        struct resource mem_res;
        struct resource *cfg_res;
+       unsigned busnr;
        int irq;
        unsigned long window_size;
 };
@@ -318,8 +319,8 @@ static int rcar_pci_setup(int nr, struct pci_sys_data *sys)
        pci_add_resource(&sys->resources, &priv->io_res);
        pci_add_resource(&sys->resources, &priv->mem_res);
 
-       /* Setup bus number based on platform device id */
-       sys->busnr = to_platform_device(priv->dev)->id;
+       /* Setup bus number based on platform device id / of bus-range */
+       sys->busnr = priv->busnr;
        return 1;
 }
 
@@ -372,6 +373,23 @@ static int rcar_pci_probe(struct platform_device *pdev)
 
        priv->window_size = SZ_1G;
 
+       if (pdev->dev.of_node) {
+               struct resource busnr;
+               int ret;
+
+               ret = of_pci_parse_bus_range(pdev->dev.of_node, &busnr);
+               if (ret < 0) {
+                       dev_err(&pdev->dev, "failed to parse bus-range\n");
+                       return ret;
+               }
+
+               priv->busnr = busnr.start;
+               if (busnr.end != busnr.start)
+                       dev_warn(&pdev->dev, "only one bus number supported\n");
+       } else {
+               priv->busnr = pdev->id;
+       }
+
        hw_private[0] = priv;
        memset(&hw, 0, sizeof(hw));
        hw.nr_controllers = ARRAY_SIZE(hw_private);
@@ -383,11 +401,20 @@ static int rcar_pci_probe(struct platform_device *pdev)
        return 0;
 }
 
+static struct of_device_id rcar_pci_of_match[] = {
+       { .compatible = "renesas,pci-r8a7790", },
+       { .compatible = "renesas,pci-r8a7791", },
+       { },
+};
+
+MODULE_DEVICE_TABLE(of, rcar_pci_of_match);
+
 static struct platform_driver rcar_pci_driver = {
        .driver = {
                .name = "pci-rcar-gen2",
                .owner = THIS_MODULE,
                .suppress_bind_attrs = true,
+               .of_match_table = rcar_pci_of_match,
        },
        .probe = rcar_pci_probe,
 };