ARM: dts: stm32: Add pinmux groups for Linux Automation GmbH TAC
authorLeonard Göhrs <l.goehrs@pengutronix.de>
Wed, 14 Jun 2023 12:32:20 +0000 (14:32 +0200)
committerAlexandre Torgue <alexandre.torgue@foss.st.com>
Tue, 11 Jul 2023 07:59:52 +0000 (09:59 +0200)
Add pinmux groups required for the Linux Automation GmbH TAC.

Signed-off-by: Leonard Göhrs <l.goehrs@pengutronix.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
arch/arm/boot/dts/st/stm32mp15-pinctrl.dtsi

index 05c9c4f..098153e 100644 (file)
@@ -6,6 +6,17 @@
 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
 
 &pinctrl {
+       adc1_ain_pins_a: adc1-ain-0 {
+               pins {
+                       pinmux = <STM32_PINMUX('F', 11, ANALOG)>, /* ADC1_INP2 */
+                                <STM32_PINMUX('B', 1, ANALOG)>, /* ADC1_INP5 */
+                                <STM32_PINMUX('B', 0, ANALOG)>, /* ADC1_INP9 */
+                                <STM32_PINMUX('C', 0, ANALOG)>, /* ADC1_INP10 */
+                                <STM32_PINMUX('C', 3, ANALOG)>, /* ADC1_INP13 */
+                                <STM32_PINMUX('A', 3, ANALOG)>; /* ADC1_INP15 */
+               };
+       };
+
        adc1_in6_pins_a: adc1-in6-0 {
                pins {
                        pinmux = <STM32_PINMUX('F', 12, ANALOG)>;
                };
        };
 
+       ethernet0_rgmii_pins_e: rgmii-4 {
+               pins1 {
+                       pinmux = <STM32_PINMUX('G', 4, AF11)>, /* ETH_RGMII_GTX_CLK */
+                                <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
+                                <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
+                                <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
+                                <STM32_PINMUX('E', 2, AF11)>, /* ETH_RGMII_TXD3 */
+                                <STM32_PINMUX('B', 11, AF11)>; /* ETH_RGMII_TX_CTL */
+                       bias-disable;
+                       drive-push-pull;
+                       slew-rate = <2>;
+               };
+               pins2 {
+                       pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
+                                <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
+                                <STM32_PINMUX('H', 6, AF11)>, /* ETH_RGMII_RXD2 */
+                                <STM32_PINMUX('H', 7, AF11)>, /* ETH_RGMII_RXD3 */
+                                <STM32_PINMUX('A', 1, AF11)>, /* ETH_RGMII_RX_CLK */
+                                <STM32_PINMUX('A', 7, AF11)>; /* ETH_RGMII_RX_CTL */
+                       bias-disable;
+               };
+       };
+
+       ethernet0_rgmii_sleep_pins_e: rgmii-sleep-4 {
+               pins1 {
+                       pinmux = <STM32_PINMUX('G', 4, ANALOG)>, /* ETH_RGMII_GTX_CLK */
+                                <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RGMII_TXD0 */
+                                <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RGMII_TXD1 */
+                                <STM32_PINMUX('C', 2, ANALOG)>, /* ETH_RGMII_TXD2 */
+                                <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RGMII_TXD3 */
+                                <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RGMII_TX_CTL */
+                                <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RGMII_RXD0 */
+                                <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RGMII_RXD1 */
+                                <STM32_PINMUX('H', 6, ANALOG)>, /* ETH_RGMII_RXD2 */
+                                <STM32_PINMUX('H', 7, ANALOG)>, /* ETH_RGMII_RXD3 */
+                                <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RGMII_RX_CLK */
+                                <STM32_PINMUX('A', 7, ANALOG)>; /* ETH_RGMII_RX_CTL */
+               };
+       };
+
        ethernet0_rmii_pins_a: rmii-0 {
                pins1 {
                        pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
                };
        };
 
+       pwm1_pins_c: pwm1-2 {
+               pins {
+                       pinmux = <STM32_PINMUX('E', 11, AF1)>; /* TIM1_CH2 */
+                       drive-push-pull;
+                       slew-rate = <0>;
+               };
+       };
+
+       pwm1_sleep_pins_c: pwm1-sleep-2 {
+               pins {
+                       pinmux = <STM32_PINMUX('E', 11, ANALOG)>; /* TIM1_CH2 */
+               };
+       };
+
        pwm2_pins_a: pwm2-0 {
                pins {
                        pinmux = <STM32_PINMUX('A', 3, AF1)>; /* TIM2_CH4 */
                };
        };
 
+       pwm8_pins_b: pwm8-1 {
+               pins {
+                       pinmux = <STM32_PINMUX('I', 5, AF3)>, /* TIM8_CH1 */
+                                <STM32_PINMUX('I', 6, AF3)>, /* TIM8_CH2 */
+                                <STM32_PINMUX('I', 7, AF3)>, /* TIM8_CH3 */
+                                <STM32_PINMUX('C', 9, AF3)>; /* TIM8_CH4 */
+                       drive-push-pull;
+                       slew-rate = <0>;
+               };
+       };
+
+       pwm8_sleep_pins_b: pwm8-sleep-1 {
+               pins {
+                       pinmux = <STM32_PINMUX('I', 5, ANALOG)>, /* TIM8_CH1 */
+                                <STM32_PINMUX('I', 6, ANALOG)>, /* TIM8_CH2 */
+                                <STM32_PINMUX('I', 7, ANALOG)>, /* TIM8_CH3 */
+                                <STM32_PINMUX('C', 9, ANALOG)>; /* TIM8_CH4 */
+               };
+       };
+
        pwm12_pins_a: pwm12-0 {
                pins {
                        pinmux = <STM32_PINMUX('H', 6, AF2)>; /* TIM12_CH1 */
                };
        };
 
+       spi2_pins_c: spi2-2 {
+               pins1 {
+                       pinmux = <STM32_PINMUX('I', 1, AF5)>, /* SPI2_SCK */
+                                <STM32_PINMUX('I', 3, AF5)>; /* SPI2_MOSI */
+                       bias-disable;
+                       drive-push-pull;
+               };
+
+               pins2 {
+                       pinmux = <STM32_PINMUX('I', 2, AF5)>; /* SPI2_MISO */
+                       bias-pull-down;
+               };
+       };
+
        spi4_pins_a: spi4-0 {
                pins {
                        pinmux = <STM32_PINMUX('E', 12, AF5)>, /* SPI4_SCK */
                };
        };
 
+       spi5_pins_a: spi5-0 {
+               pins1 {
+                       pinmux = <STM32_PINMUX('F', 7, AF5)>, /* SPI5_SCK */
+                                <STM32_PINMUX('F', 9, AF5)>; /* SPI5_MOSI */
+                       bias-disable;
+                       drive-push-pull;
+                       slew-rate = <1>;
+               };
+
+               pins2 {
+                       pinmux = <STM32_PINMUX('F', 8, AF5)>; /* SPI5_MISO */
+                       bias-disable;
+               };
+       };
+
        stusb1600_pins_a: stusb1600-0 {
                pins {
                        pinmux = <STM32_PINMUX('I', 11, GPIO)>;
                };
        };
 
+       usart3_pins_f: usart3-5 {
+               pins1 {
+                       pinmux = <STM32_PINMUX('B', 10, AF7)>, /* USART3_TX */
+                                <STM32_PINMUX('D', 12, AF7)>; /* USART3_RTS */
+                       bias-disable;
+                       drive-push-pull;
+                       slew-rate = <0>;
+               };
+               pins2 {
+                       pinmux = <STM32_PINMUX('B', 12, AF8)>, /* USART3_RX */
+                                <STM32_PINMUX('D', 11, AF7)>; /* USART3_CTS_NSS */
+                       bias-disable;
+               };
+       };
+
        usbotg_hs_pins_a: usbotg-hs-0 {
                pins {
                        pinmux = <STM32_PINMUX('A', 10, ANALOG)>; /* OTG_ID */