drm/i915: break TGL pci-ids in GT 1 & 2
authorLionel Landwerlin <lionel.g.landwerlin@intel.com>
Fri, 28 Aug 2020 13:31:25 +0000 (16:31 +0300)
committerLionel Landwerlin <lionel.g.landwerlin@intel.com>
Mon, 31 Aug 2020 14:58:26 +0000 (17:58 +0300)
I'll need this in IGT to identify the different kind of GTs and apply
the right performance query configuration.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200828133125.157171-1-lionel.g.landwerlin@intel.com
include/drm/i915_pciids.h

index 8e7ae30..7eeecb0 100644 (file)
        INTEL_VGA_DEVICE(0x4E51, info)
 
 /* TGL */
-#define INTEL_TGL_12_IDS(info) \
+#define INTEL_TGL_12_GT1_IDS(info) \
+       INTEL_VGA_DEVICE(0x9A60, info), \
+       INTEL_VGA_DEVICE(0x9A68, info), \
+       INTEL_VGA_DEVICE(0x9A70, info)
+
+#define INTEL_TGL_12_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x9A40, info), \
        INTEL_VGA_DEVICE(0x9A49, info), \
        INTEL_VGA_DEVICE(0x9A59, info), \
-       INTEL_VGA_DEVICE(0x9A60, info), \
-       INTEL_VGA_DEVICE(0x9A68, info), \
-       INTEL_VGA_DEVICE(0x9A70, info), \
        INTEL_VGA_DEVICE(0x9A78, info), \
        INTEL_VGA_DEVICE(0x9AC0, info), \
        INTEL_VGA_DEVICE(0x9AC9, info), \
        INTEL_VGA_DEVICE(0x9AD9, info), \
        INTEL_VGA_DEVICE(0x9AF8, info)
 
+#define INTEL_TGL_12_IDS(info) \
+       INTEL_TGL_12_GT1_IDS(info), \
+       INTEL_TGL_12_GT2_IDS(info)
+
 /* RKL */
 #define INTEL_RKL_IDS(info) \
        INTEL_VGA_DEVICE(0x4C80, info), \