ARM: dts: exynos: drop useless 'dma-channels/requests' properties
authorKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Sat, 30 Apr 2022 12:19:00 +0000 (14:19 +0200)
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Wed, 4 May 2022 08:23:27 +0000 (10:23 +0200)
The pl330 DMA controller provides number of DMA channels and requests
through its registers, so duplicating this information (with a chance of
mistakes) in DTS is pointless.  Additionally the DTS used always wrong
property names which causes DT schema check failures - the bindings
documented 'dma-channels' and 'dma-requests' properties without leading
hash sign.

Reported-by: Rob Herring <robh@kernel.org>
Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220430121902.59895-8-krzysztof.kozlowski@linaro.org
arch/arm/boot/dts/exynos3250.dtsi
arch/arm/boot/dts/exynos4.dtsi
arch/arm/boot/dts/exynos4210-universal_c210.dts
arch/arm/boot/dts/exynos5250.dtsi
arch/arm/boot/dts/exynos5410.dtsi
arch/arm/boot/dts/exynos5420.dtsi

index 41bb421e67c268e0ef4db6475f934bb153f59521..78dad233ff34fe760d34dcd3df18de13c468c747 100644 (file)
                        clocks = <&cmu CLK_PDMA0>;
                        clock-names = "apb_pclk";
                        #dma-cells = <1>;
-                       #dma-channels = <8>;
-                       #dma-requests = <32>;
                };
 
                pdma1: dma-controller@12690000 {
                        clocks = <&cmu CLK_PDMA1>;
                        clock-names = "apb_pclk";
                        #dma-cells = <1>;
-                       #dma-channels = <8>;
-                       #dma-requests = <32>;
                };
 
                adc: adc@126c0000 {
index 5fd17bc52321981b99885e1fe5e910b5aed7e6dd..6f0ca3354e39d0e97956e3e0bfd637f168d733fa 100644 (file)
                        clocks = <&clock CLK_PDMA0>;
                        clock-names = "apb_pclk";
                        #dma-cells = <1>;
-                       #dma-channels = <8>;
-                       #dma-requests = <32>;
                };
 
                pdma1: dma-controller@12690000 {
                        clocks = <&clock CLK_PDMA1>;
                        clock-names = "apb_pclk";
                        #dma-cells = <1>;
-                       #dma-channels = <8>;
-                       #dma-requests = <32>;
                };
 
                mdma1: dma-controller@12850000 {
                        clocks = <&clock CLK_MDMA>;
                        clock-names = "apb_pclk";
                        #dma-cells = <1>;
-                       #dma-channels = <8>;
-                       #dma-requests = <1>;
                };
 
                fimd: fimd@11c00000 {
index 138d606d58a5b63a5abe0241eb6c869030ba11d9..62bf335d5bedc8d4ade1a093745fc615e6a40995 100644 (file)
                clocks = <&clock CLK_MDMA>;
                clock-names = "apb_pclk";
                #dma-cells = <1>;
-               #dma-channels = <8>;
-               #dma-requests = <1>;
                power-domains = <&pd_lcd0>;
        };
 };
index df80ddfada2d3c13152bcd56cacb2abb7ef4b6a5..4708dcd575a7788074325772b53fc53601acd287 100644 (file)
                        clocks = <&clock CLK_PDMA0>;
                        clock-names = "apb_pclk";
                        #dma-cells = <1>;
-                       #dma-channels = <8>;
-                       #dma-requests = <32>;
                };
 
                pdma1: dma-controller@121b0000 {
                        clocks = <&clock CLK_PDMA1>;
                        clock-names = "apb_pclk";
                        #dma-cells = <1>;
-                       #dma-channels = <8>;
-                       #dma-requests = <32>;
                };
 
                mdma0: dma-controller@10800000 {
                        clocks = <&clock CLK_MDMA0>;
                        clock-names = "apb_pclk";
                        #dma-cells = <1>;
-                       #dma-channels = <8>;
-                       #dma-requests = <1>;
                };
 
                mdma1: dma-controller@11c10000 {
                        clocks = <&clock CLK_MDMA1>;
                        clock-names = "apb_pclk";
                        #dma-cells = <1>;
-                       #dma-channels = <8>;
-                       #dma-requests = <1>;
                };
 
                gsc_0: gsc@13e00000 {
index 4d797a9abba4b7677f445ceb40baf55b941d1ecd..8a6b890fb8f712578e11dd864112c2e0c4b585cb 100644 (file)
                        clocks = <&clock CLK_PDMA0>;
                        clock-names = "apb_pclk";
                        #dma-cells = <1>;
-                       #dma-channels = <8>;
-                       #dma-requests = <32>;
                };
 
                pdma1: dma-controller@121b0000 {
                        clocks = <&clock CLK_PDMA1>;
                        clock-names = "apb_pclk";
                        #dma-cells = <1>;
-                       #dma-channels = <8>;
-                       #dma-requests = <32>;
                };
 
                audi2s0: i2s@3830000 {
index 21b60870504908daa161fa993296bee294f80c40..9f2523a873d9df41ff64e1162f06d64bac14eca1 100644 (file)
                        clocks = <&clock_audss EXYNOS_ADMA>;
                        clock-names = "apb_pclk";
                        #dma-cells = <1>;
-                       #dma-channels = <6>;
-                       #dma-requests = <16>;
                        power-domains = <&mau_pd>;
                };
 
                        clocks = <&clock CLK_PDMA0>;
                        clock-names = "apb_pclk";
                        #dma-cells = <1>;
-                       #dma-channels = <8>;
-                       #dma-requests = <32>;
                };
 
                pdma1: dma-controller@121b0000 {
                        clocks = <&clock CLK_PDMA1>;
                        clock-names = "apb_pclk";
                        #dma-cells = <1>;
-                       #dma-channels = <8>;
-                       #dma-requests = <32>;
                };
 
                mdma0: dma-controller@10800000 {
                        clocks = <&clock CLK_MDMA0>;
                        clock-names = "apb_pclk";
                        #dma-cells = <1>;
-                       #dma-channels = <8>;
-                       #dma-requests = <1>;
                };
 
                mdma1: dma-controller@11c10000 {
                        clocks = <&clock CLK_MDMA1>;
                        clock-names = "apb_pclk";
                        #dma-cells = <1>;
-                       #dma-channels = <8>;
-                       #dma-requests = <1>;
                        /*
                         * MDMA1 can support both secure and non-secure
                         * AXI transactions. When this is enabled in