/// LLVM code to machine instructions with possibly generic opcodes.
virtual bool addIRTranslator() { return true; }
+ /// This method may be implemented by targets that want to run passes
+ /// immediately before the register bank selection.
+ virtual void addPreRegBankSelect() {}
+
+ /// This method should install a register bank selector pass, which
+ /// assigns register banks to virtual registers without a register
+ /// class or register banks.
+ virtual bool addRegBankSelect() { return true; }
+
/// Add the complete, standard set of LLVM CodeGen passes.
/// Fully developed targets will not generally override this.
virtual void addMachinePasses();
if (LLVM_UNLIKELY(EnableGlobalISel)) {
if (PassConfig->addIRTranslator())
return nullptr;
+
+ // Before running the register bank selector, ask the target if it
+ // wants to run some passes.
+ PassConfig->addPreRegBankSelect();
+
+ if (PassConfig->addRegBankSelect())
+ return nullptr;
+
} else if (PassConfig->addInstSelector())
return nullptr;
#ifdef LLVM_BUILD_GLOBAL_ISEL
# include "llvm/CodeGen/GlobalISel/IRTranslator.h"
#endif
+#include "llvm/CodeGen/GlobalISel/RegBankSelect.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/RegAllocRegistry.h"
#include "llvm/IR/Function.h"
bool addInstSelector() override;
#ifdef LLVM_BUILD_GLOBAL_ISEL
bool addIRTranslator() override;
+ bool addRegBankSelect() override;
#endif
bool addILPOpts() override;
void addPreRegAlloc() override;
addPass(new IRTranslator());
return false;
}
+bool AArch64PassConfig::addRegBankSelect() {
+ addPass(new RegBankSelect());
+ return false;
+}
#endif
bool AArch64PassConfig::addILPOpts() {